first commit
This commit is contained in:
chacha
4
.gitignore
vendored
Normal file
4
.gitignore
vendored
Normal file
@@ -0,0 +1,4 @@
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*~
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*.o
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*.log
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V2MemTest
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33
Draw.c
Normal file
33
Draw.c
Normal file
@@ -0,0 +1,33 @@
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#include <cvg.h>
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#include <sst1init.h>
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#include "Draw.h"
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#define XY_ONE (1<<SST_XY_FRACBITS)
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void
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drawTriangle( const SstRegs *sst,
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const int x,
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const int y,
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const int tSize)
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{
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ISET(sst->vA.x,x);
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ISET(sst->vA.y,y);
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ISET(sst->vB.x,x+XY_ONE*tSize);
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ISET(sst->vB.y,y);
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ISET(sst->vC.x,x);
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ISET(sst->vC.y,y+XY_ONE*tSize);
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ISET(sst->s,0);
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ISET(sst->t,0);
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ISET(sst->w,0);
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ISET(sst->dsdx,1<<SST_ST_FRACBITS);
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ISET(sst->dtdx,0);
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ISET(sst->dwdx,0);
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ISET(sst->dsdy,0);
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ISET(sst->dtdy,1<<SST_ST_FRACBITS);
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ISET(sst->dwdy,0);
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ISET(sst->triangleCMD,0);
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ISET(sst->vB.x, (x<<SST_XY_FRACBITS));
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ISET(sst->vB.y, ((y+tSize)<<SST_XY_FRACBITS));
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ISET(sst->triangleCMD, 0xFFFFFFFF);
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}
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6
Draw.h
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6
Draw.h
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@@ -0,0 +1,6 @@
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#ifndef _DEF_DRAW_H_
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#define _DEF_DRAW_H_
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void drawTriangle( const SstRegs *sst, const int x, const int y, const int tSize);
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#endif //_DEF_DRAW_H_
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327
FaultSources.c
Normal file
327
FaultSources.c
Normal file
@@ -0,0 +1,327 @@
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#include <stdio.h>
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#include <string.h>
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#include "FaultSources.h"
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#include "Utils.h"
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def_sFaultSourceScoreRec ar_dFaultScores[NB_FAULT_SOURCE] =
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{
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{
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.eThisFaultSource = VOODOO_BOARD,
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.szName = "VOODOO_BOARD",
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.szLoc = "Main Board",
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.eParrentFaultSource = _INVALID_FAULT_SOURCE_,
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.dScore = 0.0
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},
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FAULT_SOURCES(GEN_FAULT_SOURCES_ARRAY)
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};
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def_sFaultSourceScoreRec ar_dFaultScores_sorted[NB_FAULT_SOURCE];
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void
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FaultSource_Reset()
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{
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for(def_eFaultSource idx=0;idx<NB_FAULT_SOURCE;idx++)
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ar_dFaultScores[idx].dScore = 0.0;
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}
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static unsigned long
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FaultSource_getNbDeps(const def_eFaultSource eFaultSource)
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{
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unsigned long res = 0;
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for(unsigned long idx = 0;
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idx < NB_FAULT_SOURCE;
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idx++)
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if(ar_dFaultScores[idx].eParrentFaultSource == eFaultSource)
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res++;
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return res;
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}
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void
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FaultSource_AddScore( def_eFaultSource eFaultSource,
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double dScore)
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{
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double dDivider = 1.0;
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do
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{
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dScore /= dDivider;
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ar_dFaultScores[eFaultSource].dScore += dScore;
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eFaultSource = ar_dFaultScores[eFaultSource].eParrentFaultSource;
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dDivider = FaultSource_getNbDeps(eFaultSource);
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if(dDivider <= 0) dDivider = 1.0;
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}while(eFaultSource != _INVALID_FAULT_SOURCE_);
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}
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static unsigned long
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FaultSource_Sort_GetIdx(const def_eFaultSource eFaultSource)
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{
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for(unsigned long idx = 0;
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idx < NB_FAULT_SOURCE;
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idx++)
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if(ar_dFaultScores_sorted[idx].eThisFaultSource == eFaultSource)
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return idx;
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return _INVALID_FAULT_SOURCE_;
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}
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static inline void
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FaultSource_Sort_Swap( const def_eFaultSource eFaultSourceCurrentA,
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const def_eFaultSource eFaultSourceCurrentB)
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{
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static def_sFaultSourceScoreRec tmp;
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memcpy(&tmp,&ar_dFaultScores_sorted[eFaultSourceCurrentA],sizeof(def_sFaultSourceScoreRec));
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memcpy(&ar_dFaultScores_sorted[eFaultSourceCurrentA],&ar_dFaultScores_sorted[eFaultSourceCurrentB],sizeof(def_sFaultSourceScoreRec));
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memcpy(&ar_dFaultScores_sorted[eFaultSourceCurrentB],&tmp,sizeof(def_sFaultSourceScoreRec));
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}
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void
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FaultSource_Sort()
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{
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unsigned char bSwapped = 1;
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memcpy(ar_dFaultScores_sorted,ar_dFaultScores,sizeof(ar_dFaultScores_sorted));
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// shaker sort
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while(bSwapped)
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{
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bSwapped = 0;
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for(long eFaultSourceCurrentComp=0;
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eFaultSourceCurrentComp<(NB_FAULT_SOURCE-1);
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eFaultSourceCurrentComp++)
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{
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if( ar_dFaultScores_sorted[eFaultSourceCurrentComp].dScore
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< ar_dFaultScores_sorted[eFaultSourceCurrentComp+1].dScore)
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{
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FaultSource_Sort_Swap(eFaultSourceCurrentComp,eFaultSourceCurrentComp+1);
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bSwapped=1;
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break;
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}
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}
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//if(!bSwapped)
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// break;
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for(long eFaultSourceCurrentComp=(NB_FAULT_SOURCE-2);
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eFaultSourceCurrentComp>=0;
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eFaultSourceCurrentComp--)
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{
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if( ar_dFaultScores_sorted[eFaultSourceCurrentComp].dScore
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< ar_dFaultScores_sorted[eFaultSourceCurrentComp+1].dScore)
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{
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FaultSource_Sort_Swap(eFaultSourceCurrentComp,eFaultSourceCurrentComp+1);
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bSwapped=1;
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break;
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}
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}
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}
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// updating refs
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for(long eFaultSourceIdx=0;
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eFaultSourceIdx<NB_FAULT_SOURCE;
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eFaultSourceIdx++)
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{
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unsigned long idx = FaultSource_Sort_GetIdx(ar_dFaultScores_sorted[eFaultSourceIdx].eParrentFaultSource);
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ar_dFaultScores_sorted[eFaultSourceIdx].eParrentFaultSource = idx;
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}
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for(long eFaultSourceIdx=0;
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eFaultSourceIdx<NB_FAULT_SOURCE;
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eFaultSourceIdx++)
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{
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ar_dFaultScores_sorted[eFaultSourceIdx].eThisFaultSource = eFaultSourceIdx;
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}
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}
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void
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FaultSource_GetLoc(def_eFaultSource eFaultSource, char* loc)
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{
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loc[0]='\0';
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strcpy(loc,ar_dFaultScores_sorted[eFaultSource].szLoc);
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eFaultSource = ar_dFaultScores_sorted[eFaultSource].eParrentFaultSource;
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while(eFaultSource != _INVALID_FAULT_SOURCE_)
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{
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static char buff[1024];
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sprintf(buff,"%s->%s",ar_dFaultScores_sorted[eFaultSource].szLoc,loc);
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strcpy(loc,buff);
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eFaultSource = ar_dFaultScores_sorted[eFaultSource].eParrentFaultSource;
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}
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}
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void
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FaultSource_Display()
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{
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double dScoreSum = 0;
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for(def_eFaultSource eFaultSourceCurrent=0;
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eFaultSourceCurrent < NB_FAULT_SOURCE && ar_dFaultScores_sorted[eFaultSourceCurrent].dScore > 0;
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eFaultSourceCurrent++ )
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dScoreSum+=ar_dFaultScores_sorted[eFaultSourceCurrent].dScore;
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printf("------------------------------------------------\n");
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printf("\nDefects list:\n\n");
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printf("Score\tElement [Loc]\n");
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printf("------------------------------------------------\n");
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for(def_eFaultSource eFaultSourceCurrent=0;
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eFaultSourceCurrent < NB_FAULT_SOURCE
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&& (ar_dFaultScores_sorted[eFaultSourceCurrent].dScore > 0);
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eFaultSourceCurrent++ )
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{
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static char buff[1024];
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FaultSource_GetLoc(eFaultSourceCurrent,buff);
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printf("%02.3f\t%s [%s]\n",
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100*ar_dFaultScores_sorted[eFaultSourceCurrent].dScore/dScoreSum,
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ar_dFaultScores_sorted[eFaultSourceCurrent].szName,
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buff);
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}
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}
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void
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WordBitFaultSet( const unsigned long ErrorMark,
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const double dScore,
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const def_eFaultSource eFaultSourceL,
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const def_eFaultSource eFaultSourceH)
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{
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/* loop unrolling optimization
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for(unsigned long bitPos = 0; bitPos <= 31 ; bitPos++)
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{
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if(ErrorMark & (1<<bitPos))
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{
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if(bitPos<16)
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FaultSource_AddScore(eFaultSourceL + bitPos, dScore);
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else
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FaultSource_AddScore(eFaultSourceH + bitPos - 16, dScore);
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}
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}*/
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if(ErrorMark & 0x00000001)
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FaultSource_AddScore(eFaultSourceL, dScore);
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if(ErrorMark & 0x00000002)
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FaultSource_AddScore(eFaultSourceL+1, dScore);
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if(ErrorMark & 0x00000004)
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FaultSource_AddScore(eFaultSourceL+2, dScore);
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if(ErrorMark & 0x00000008)
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FaultSource_AddScore(eFaultSourceL+3, dScore);
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if(ErrorMark & 0x00000010)
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FaultSource_AddScore(eFaultSourceL+4, dScore);
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if(ErrorMark & 0x00000020)
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FaultSource_AddScore(eFaultSourceL+5, dScore);
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if(ErrorMark & 0x00000040)
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FaultSource_AddScore(eFaultSourceL+6, dScore);
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if(ErrorMark & 0x00000080)
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FaultSource_AddScore(eFaultSourceL+7, dScore);
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if(ErrorMark & 0x00000100)
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FaultSource_AddScore(eFaultSourceL+8, dScore);
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if(ErrorMark & 0x00000200)
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FaultSource_AddScore(eFaultSourceL+9, dScore);
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if(ErrorMark & 0x00000400)
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FaultSource_AddScore(eFaultSourceL+10, dScore);
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if(ErrorMark & 0x00000800)
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FaultSource_AddScore(eFaultSourceL+11, dScore);
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if(ErrorMark & 0x00001000)
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FaultSource_AddScore(eFaultSourceL+12, dScore);
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if(ErrorMark & 0x00002000)
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FaultSource_AddScore(eFaultSourceL+13, dScore);
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if(ErrorMark & 0x00004000)
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FaultSource_AddScore(eFaultSourceL+14, dScore);
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if(ErrorMark & 0x00008000)
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FaultSource_AddScore(eFaultSourceL+15, dScore);
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if(ErrorMark & 0x00010000)
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FaultSource_AddScore(eFaultSourceH, dScore);
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if(ErrorMark & 0x00020000)
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FaultSource_AddScore(eFaultSourceH+1, dScore);
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if(ErrorMark & 0x00040000)
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FaultSource_AddScore(eFaultSourceH+2, dScore);
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if(ErrorMark & 0x00080000)
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FaultSource_AddScore(eFaultSourceH+3, dScore);
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if(ErrorMark & 0x00100000)
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FaultSource_AddScore(eFaultSourceH+4, dScore);
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if(ErrorMark & 0x00200000)
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FaultSource_AddScore(eFaultSourceH+5, dScore);
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if(ErrorMark & 0x00400000)
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FaultSource_AddScore(eFaultSourceH+6, dScore);
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if(ErrorMark & 0x00800000)
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FaultSource_AddScore(eFaultSourceH+7, dScore);
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if(ErrorMark & 0x01000000)
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FaultSource_AddScore(eFaultSourceH+8, dScore);
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if(ErrorMark & 0x02000000)
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FaultSource_AddScore(eFaultSourceH+9, dScore);
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if(ErrorMark & 0x04000000)
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FaultSource_AddScore(eFaultSourceH+10, dScore);
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if(ErrorMark & 0x08000000)
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FaultSource_AddScore(eFaultSourceH+11, dScore);
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if(ErrorMark & 0x10000000)
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FaultSource_AddScore(eFaultSourceH+12, dScore);
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if(ErrorMark & 0x20000000)
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FaultSource_AddScore(eFaultSourceH+13, dScore);
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if(ErrorMark & 0x40000000)
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FaultSource_AddScore(eFaultSourceH+14, dScore);
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if(ErrorMark & 0x80000000)
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FaultSource_AddScore(eFaultSourceH+15, dScore);
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}
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void
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QuartetBitFaultSet( const unsigned long ErrorMark,
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const double dScore,
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const def_eFaultSource eFaultSource)
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{
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/* loop unrolling optimization
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for(unsigned long bitPos = 0; bitPos <= 4 ; bitPos++)
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{
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if(ErrorMark & (1<<bitPos))
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{
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FaultSource_AddScore(eFaultSource + bitPos, dScore);
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}
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}*/
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if(ErrorMark & 0x1)
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FaultSource_AddScore(eFaultSource, dScore);
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if(ErrorMark & 0x2)
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FaultSource_AddScore(eFaultSource+1, dScore);
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if(ErrorMark & 0x4)
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FaultSource_AddScore(eFaultSource+2, dScore);
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if(ErrorMark & 0x8)
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FaultSource_AddScore(eFaultSource+3, dScore);
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}
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inline void
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MemChipDQFaultSet( const unsigned long ErrorMark,
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const double dScore,
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const def_eFaultSource eFaultSourceL,
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const def_eFaultSource eFaultSourceH)
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{
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WordBitFaultSet(ErrorMark, dScore, eFaultSourceL + 1, eFaultSourceH + 1);
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}
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inline void
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TMUTexDataFaultSet( const unsigned long ErrorMark_w0w1,
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const unsigned long ErrorMark_w2w3,
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const double dScore,
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const def_eFaultSource eTMUFaultSource)
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{
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WordBitFaultSet(ErrorMark_w0w1, dScore, eTMUFaultSource + 0 + 1, eTMUFaultSource + 16 + 1);
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WordBitFaultSet(ErrorMark_w2w3, dScore, eTMUFaultSource + 32 + 1, eTMUFaultSource + 48 + 1);
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}
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inline void
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TMUTexDataCtrlFaultSet( const unsigned long ErrorMark,
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double dScore,
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const def_eFaultSource eFaultSourceCASL,
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const def_eFaultSource eFaultSourceCASH,
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const def_eFaultSource eFaultSourceRAS,
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const def_eFaultSource eFaultSourceWE
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)
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||||
{
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if( ErrorMark && (count_bit32(ErrorMark) > 16) )
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{
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if(ErrorMark & 0x000000FF)
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FaultSource_AddScore(eFaultSourceCASL,dScore/2);
|
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if(ErrorMark & 0x0000FF00)
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FaultSource_AddScore(eFaultSourceCASH,dScore/2);
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if(ErrorMark & 0x00FF0000)
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FaultSource_AddScore(eFaultSourceCASL,dScore/2);
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if(ErrorMark & 0xFF000000)
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FaultSource_AddScore(eFaultSourceCASH,dScore/2);
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FaultSource_AddScore(eFaultSourceRAS,dScore/4);
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FaultSource_AddScore(eFaultSourceWE,dScore/4);
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}
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||||
}
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||||
|
||||
1027
FaultSources.h
Normal file
1027
FaultSources.h
Normal file
File diff suppressed because it is too large
Load Diff
21
Makefile
Normal file
21
Makefile
Normal file
@@ -0,0 +1,21 @@
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|
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CC=gcc
|
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CFLAGS=-Wall -std=gnu99 -O6 -march=pentium3 -fomit-frame-pointer -funroll-loops \
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-fexpensive-optimizations -ffast-math -fno-strict-aliasing
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||||
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||||
CFLAGS+=-I. -I/home/chacha/glide-test/glide2x/cvg/init -I/home/chacha/glide-test/glide2x/swlibs/newpci/pcilib -I/home/chacha/glide-test/glide2x/swlibs/fxmisc -I/home/chacha/glide-test/glide2x/cvg/incsrc -I/home/chacha/glide-test/glide2x/cvg/glide/src
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CFLAGS+=-DCVG
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||||
#LFLAGS=-llibglide -L/home/chacha/glide-test/glide2x/cvg/lib
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LFLAGS=-lglide -L/home/chacha/glide-test/glide2x/cvg/lib
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OBJ=main.o FaultSources.o Utils.o Draw.o Test_Address.o Test_Data.o Test_Data_Huge.o
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||||
|
||||
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%.o: %.c
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||||
$(CC) -c -o $@ $< $(CFLAGS)
|
||||
|
||||
V2MemTest : $(OBJ)
|
||||
$(CC) -o $@ $(LFLAGS) $^
|
||||
|
||||
all: V2MemTest
|
||||
574
Test_Address.c
Normal file
574
Test_Address.c
Normal file
@@ -0,0 +1,574 @@
|
||||
#include <cvg.h>
|
||||
#include <fxpci.h>
|
||||
#include <sst1init.h>
|
||||
#include <3dfx.h>
|
||||
#include <glide.h>
|
||||
|
||||
#include "FaultSources.h"
|
||||
#include "Utils.h"
|
||||
#include "Draw.h"
|
||||
|
||||
#include "Test_Address.h"
|
||||
|
||||
typedef struct _def_sTestAddress {
|
||||
FxU32 u32Addr;
|
||||
unsigned char nBank; // RAS0 and RAS1 (Front/Back)
|
||||
unsigned char nColBit;
|
||||
unsigned char nRowBit;
|
||||
}def_sTestAddress;
|
||||
|
||||
/*
|
||||
static sst1DeviceInfoStruct devInfo;
|
||||
static FxU32* sst;
|
||||
static SstRegs *sstregs;
|
||||
*/
|
||||
|
||||
unsigned long
|
||||
RenderTestAddress( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const char ucNumTMU,
|
||||
const unsigned char RamSizeMB)
|
||||
{
|
||||
devInfo->tmuInit0[(int)ucNumTMU] = SST_TREXINIT0_DEFAULT ;
|
||||
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sstregs,ucNumTMU)->trexInit0, devInfo->tmuInit0[(int)ucNumTMU]);
|
||||
sst1InitIdle(sst);
|
||||
/*
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sstregs,ucNumTMU)->trexInit0, 0x5000 | (devInfo->tmuInit0[(int)ucNumTMU] & ~0x7000));
|
||||
sst1InitIdle(sst);
|
||||
*/
|
||||
|
||||
// set downstream TMUs to passthrough
|
||||
for (int i=0; i<ucNumTMU; i++)
|
||||
ISET(SST_TREX(sstregs,i)->textureMode, SST_TC_PASS | SST_TCA_PASS);
|
||||
|
||||
unsigned long NbErr=0;
|
||||
//long TestVal1;
|
||||
//long TestVal2;
|
||||
//long TestValBlank1;
|
||||
//long TestValBlank2;
|
||||
|
||||
const def_sTestAddress add_list[] =
|
||||
{
|
||||
// Bank0
|
||||
{0x000000,0,0,0},
|
||||
/* not addressable because its a 64bit bus
|
||||
{0x000001,0,0,0,0}
|
||||
{0x000002,0,0,0,0}
|
||||
{0x000004,0,0,0,0}
|
||||
*/
|
||||
{0x000008,0,1,0},
|
||||
{0x000010,0,2,0}, {0x000018,0,2,0}, // target + adjacent pin
|
||||
{0x000020,0,3,0}, {0x000030,0,3,0},
|
||||
{0x000040,0,4,0}, {0x000060,0,4,0},
|
||||
{0x000080,0,5,0}, {0x0000C0,0,5,0},
|
||||
{0x000100,0,6,0}, {0x000180,0,6,0},
|
||||
{0x000200,0,7,0}, {0x000300,0,7,0},
|
||||
{0x000400,0,8,0}, {0x000600,0,8,0},
|
||||
{0x000800,0,9,0}, {0x000C00,0,9,0}, // => Ignoring adjacent for now
|
||||
{0x001000,0,0,1}, {0x001800,0,0,1}, // It seems useless
|
||||
{0x002000,0,0,2}, {0x003000,0,0,2},
|
||||
{0x004000,0,0,3}, {0x006000,0,0,3},
|
||||
{0x008000,0,0,4}, {0x00C000,0,0,4},
|
||||
{0x010000,0,0,5}, {0x018000,0,0,5},
|
||||
{0x020000,0,0,6}, {0x030000,0,0,6},
|
||||
{0x040000,0,0,7}, {0x060000,0,0,7},
|
||||
{0x080000,0,0,8}, {0x0C0000,0,0,8},
|
||||
{0x100000,0,0,9}, {0x180000,0,0,9},
|
||||
|
||||
// Bank1
|
||||
{0x200000,1,0,0},
|
||||
/* not addressable because its a 64bit bus
|
||||
{0x200001,0,0,0,0}
|
||||
{0x200002,0,0,0,0}
|
||||
{0x200004,0,0,0,0}
|
||||
*/
|
||||
{0x200008,1,1,0},
|
||||
{0x200010,1,2,0}, {0x200018,1,2,0},
|
||||
{0x200020,1,3,0}, {0x200030,1,3,0},
|
||||
{0x200040,1,4,0}, {0x200060,1,4,0},
|
||||
{0x200080,1,5,0}, {0x2000C0,1,5,0},
|
||||
{0x200100,1,6,0}, {0x200180,1,6,0},
|
||||
{0x200200,1,7,0}, {0x200300,1,7,0},
|
||||
{0x200400,1,8,0}, {0x200600,1,8,0},
|
||||
{0x200800,1,9,0}, {0x200C00,1,9,0},
|
||||
{0x201000,1,0,1}, {0x201800,1,0,1},
|
||||
{0x202000,1,0,2}, {0x203000,1,0,2},
|
||||
{0x204000,1,0,3}, {0x206000,1,0,3},
|
||||
{0x208000,1,0,4}, {0x20C000,1,0,4},
|
||||
{0x210000,1,0,5}, {0x218000,1,0,5},
|
||||
{0x220000,1,0,6}, {0x230000,1,0,6},
|
||||
{0x240000,1,0,7}, {0x260000,1,0,7},
|
||||
{0x280000,1,0,8}, {0x2C0000,1,0,8},
|
||||
{0x300000,1,0,9}, {0x380000,1,0,9},
|
||||
};
|
||||
|
||||
for(unsigned char idx=0;
|
||||
idx < sizeof(add_list)/sizeof(def_sTestAddress);
|
||||
idx++)
|
||||
{
|
||||
if(RamSizeMB<4 && add_list[idx].u32Addr >= 0x300000) continue;
|
||||
if(RamSizeMB<3 && add_list[idx].u32Addr >= 0x200000) continue;
|
||||
if(RamSizeMB<2 && add_list[idx].u32Addr >= 0x100000) continue;
|
||||
|
||||
const FxU32 TestVal1 = get_notnull_random_balanced_mByte();
|
||||
const FxU32 TestVal2 = get_notnull_random_balanced_mByte();
|
||||
const FxU32 TestValBlank1 = get_notnull_random_balanced_mByte();
|
||||
const FxU32 TestValBlank2 = get_notnull_random_balanced_mByte();
|
||||
|
||||
// Clearing memory targets
|
||||
for(unsigned char idxclr=0;
|
||||
idxclr < sizeof(add_list)/sizeof(def_sTestAddress);
|
||||
idxclr++)
|
||||
{
|
||||
if(RamSizeMB<4 && add_list[idxclr].u32Addr >= 0x300000) continue;
|
||||
if(RamSizeMB<3 && add_list[idxclr].u32Addr >= 0x200000) continue;
|
||||
if(RamSizeMB<2 && add_list[idxclr].u32Addr >= 0x100000) continue;
|
||||
|
||||
/* set to mem addr */
|
||||
ISET(sstregs->texBaseAddr, (add_list[idxclr].u32Addr>>3));
|
||||
/* First line, using bits 00..31*/
|
||||
volatile const FxU32 *texAddrBlank = (ucNumTMU<<(21-2)) + (((FxU32)0/*LOD0*/)<<(17-2)) + (FxU32 *)SST_TEX_ADDRESS(sst);
|
||||
ISET(texAddrBlank[0], TestValBlank1); /* write a value */
|
||||
/* Second line, to use bits 32..63*/
|
||||
volatile const FxU32 *texAddrBlank2 = (ucNumTMU<<(21-2)) + (((FxU32)0/*LOD0*/)<<(17-2)) + (1<<(9-2))+ (FxU32 *)SST_TEX_ADDRESS(sst);
|
||||
ISET(texAddrBlank2[0], TestValBlank2); /* write a value */
|
||||
}
|
||||
|
||||
/* set to mem addr */
|
||||
ISET(sstregs->texBaseAddr, (add_list[idx].u32Addr>>3));
|
||||
/* First line, using bits 00..31*/
|
||||
volatile const FxU32 *texAddr = (ucNumTMU<<(21-2)) + (((FxU32)0/*LOD0*/)<<(17-2)) + (FxU32 *)SST_TEX_ADDRESS(sst);
|
||||
ISET(texAddr[0], TestVal1); /* write a value */
|
||||
/* Second line, to use bits 32..63*/
|
||||
volatile const FxU32 *texAddr2 = (ucNumTMU<<(21-2)) + (((FxU32)0/*LOD0*/)<<(17-2)) + (1<<(9-2))+ (FxU32 *)SST_TEX_ADDRESS(sst);
|
||||
ISET(texAddr2[0], TestVal2); /* write a value */
|
||||
|
||||
// Checking expected memory map is there
|
||||
for(unsigned char idxdraw=0;
|
||||
idxdraw < sizeof(add_list) / sizeof(def_sTestAddress);
|
||||
idxdraw++)
|
||||
{
|
||||
if(RamSizeMB<4 && add_list[idxdraw].u32Addr >= 0x300000) continue;
|
||||
if(RamSizeMB<3 && add_list[idxdraw].u32Addr >= 0x200000) continue;
|
||||
if(RamSizeMB<2 && add_list[idxdraw].u32Addr >= 0x100000) continue;
|
||||
|
||||
// testing copy beyond tested bit is useless & can raise
|
||||
// false positive
|
||||
if(idxdraw > idx) break;
|
||||
|
||||
/* set to mem addr */
|
||||
ISET(sstregs->texBaseAddr, (add_list[idxdraw].u32Addr >> 3));
|
||||
drawTriangle(sstregs, 0, 0, 4); /* draw a 4x4 triangle */
|
||||
|
||||
// First line, to use bits 00..31
|
||||
const FxU32 L1 = IGET(sst[(SST_LFB_ADDR>>2) + 0]);
|
||||
// Second line,to use bits 32..63
|
||||
const FxU32 L2 = IGET(sst[(SST_LFB_ADDR>>2) + (2048>>2) + 0]);
|
||||
|
||||
const unsigned long ErrorMark_L1 = (idxdraw == idx) ? (L1 ^ TestVal1) : (L1 ^ TestValBlank1);
|
||||
const unsigned long ErrorMark_L2 = (idxdraw == idx) ? (L2 ^ TestVal2) : (L2 ^ TestValBlank2);
|
||||
|
||||
const unsigned long ErrorMarkBlank_L1 = (idxdraw == idx) ? (L1 ^ TestValBlank1) : (L1 ^ TestVal1);
|
||||
const unsigned long ErrorMarkBlank_L2 = (idxdraw == idx) ? (L2 ^ TestValBlank2) : (L2 ^ TestVal2) ;
|
||||
|
||||
if(ErrorMark_L1 || ErrorMark_L2)
|
||||
{
|
||||
const def_eFaultSource TMUTexADDR_0_0 = (ucNumTMU == 0) ? U9_TMU0_TEX_ADDR_0_0 : U8_TMU1_TEX_ADDR_0_0;
|
||||
const def_eFaultSource TMUTexADDR_1_0 = (ucNumTMU == 0) ? U9_TMU0_TEX_ADDR_1_0 : U8_TMU1_TEX_ADDR_1_0;
|
||||
const def_eFaultSource TMUTexADDR_2_0 = (ucNumTMU == 0) ? U9_TMU0_TEX_ADDR_2_0 : U8_TMU1_TEX_ADDR_2_0;
|
||||
const def_eFaultSource TMUTexADDR_3_0 = (ucNumTMU == 0) ? U9_TMU0_TEX_ADDR_3_0 : U8_TMU1_TEX_ADDR_3_0;
|
||||
const def_eFaultSource TMUTexWE = (ucNumTMU == 0) ? U9_TMU0_TEX_WE : U8_TMU1_TEX_WE;
|
||||
const def_eFaultSource TMUTexCAS0 = (ucNumTMU == 0) ? U9_TMU0_TEX_CAS0 : U8_TMU1_TEX_CAS0;
|
||||
const def_eFaultSource TMUTexCAS1 = (ucNumTMU == 0) ? U9_TMU0_TEX_CAS1 : U8_TMU1_TEX_CAS1;
|
||||
const def_eFaultSource TMUTexCAS2 = (ucNumTMU == 0) ? U9_TMU0_TEX_CAS2 : U8_TMU1_TEX_CAS2;
|
||||
const def_eFaultSource TMUTexCAS3 = (ucNumTMU == 0) ? U9_TMU0_TEX_CAS3 : U8_TMU1_TEX_CAS3;
|
||||
const def_eFaultSource _TMUTexRAS0 = (ucNumTMU == 0) ? U9_TMU0_TEX_RAS0 : U8_TMU1_TEX_RAS0;
|
||||
const def_eFaultSource _TMUTexRAS1 = (ucNumTMU == 0) ? U9_TMU0_TEX_RAS1 : U8_TMU1_TEX_RAS1;
|
||||
const def_eFaultSource TMUTexRASCurrent = (add_list[idxdraw].nBank == 0) ? _TMUTexRAS0 : _TMUTexRAS1;
|
||||
const def_eFaultSource _MEMChip_B0_0_A0 = (ucNumTMU == 0) ? U14_A0 : U13_A0;
|
||||
const def_eFaultSource _MEMChip_B0_1_A0 = (ucNumTMU == 0) ? U12_A0 : U11_A0;
|
||||
const def_eFaultSource _MEMChip_B0_2_A0 = (ucNumTMU == 0) ? U18_A0 : U16_A0;
|
||||
const def_eFaultSource _MEMChip_B0_3_A0 = (ucNumTMU == 0) ? U17_A0 : U15_A0;
|
||||
const def_eFaultSource _MEMChip_B1_0_A0 = (ucNumTMU == 0) ? U23_A0 : U27_A0;
|
||||
const def_eFaultSource _MEMChip_B1_1_A0 = (ucNumTMU == 0) ? U24_A0 : U28_A0;
|
||||
const def_eFaultSource _MEMChip_B1_2_A0 = (ucNumTMU == 0) ? U25_A0 : U29_A0;
|
||||
const def_eFaultSource _MEMChip_B1_3_A0 = (ucNumTMU == 0) ? U26_A0 : U30_A0;
|
||||
const def_eFaultSource MEMChip_0_A0 = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_0_A0 : _MEMChip_B1_0_A0;
|
||||
const def_eFaultSource MEMChip_1_A0 = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_1_A0 : _MEMChip_B1_1_A0;
|
||||
const def_eFaultSource MEMChip_2_A0 = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_2_A0 : _MEMChip_B1_2_A0;
|
||||
const def_eFaultSource MEMChip_3_A0 = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_3_A0 : _MEMChip_B1_3_A0;
|
||||
|
||||
const def_eFaultSource _MEMChip_B0_0_CASL = (ucNumTMU == 0) ? U14_CASL : U13_CASL;
|
||||
const def_eFaultSource _MEMChip_B0_1_CASL = (ucNumTMU == 0) ? U12_CASL : U11_CASL;
|
||||
const def_eFaultSource _MEMChip_B0_2_CASL = (ucNumTMU == 0) ? U18_CASL : U16_CASL;
|
||||
const def_eFaultSource _MEMChip_B0_3_CASL = (ucNumTMU == 0) ? U17_CASL : U15_CASL;
|
||||
const def_eFaultSource _MEMChip_B1_0_CASL = (ucNumTMU == 0) ? U23_CASL : U27_CASL;
|
||||
const def_eFaultSource _MEMChip_B1_1_CASL = (ucNumTMU == 0) ? U24_CASL : U28_CASL;
|
||||
const def_eFaultSource _MEMChip_B1_2_CASL = (ucNumTMU == 0) ? U25_CASL : U29_CASL;
|
||||
const def_eFaultSource _MEMChip_B1_3_CASL = (ucNumTMU == 0) ? U26_CASL : U30_CASL;
|
||||
const def_eFaultSource MEMChip_0_CASL = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_0_CASL : _MEMChip_B1_0_CASL;
|
||||
const def_eFaultSource MEMChip_1_CASL = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_1_CASL : _MEMChip_B1_1_CASL;
|
||||
const def_eFaultSource MEMChip_2_CASL = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_2_CASL : _MEMChip_B1_2_CASL;
|
||||
const def_eFaultSource MEMChip_3_CASL = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_3_CASL : _MEMChip_B1_3_CASL;
|
||||
|
||||
const def_eFaultSource _MEMChip_B0_0_CASH = (ucNumTMU == 0) ? U14_CASH : U13_CASH;
|
||||
const def_eFaultSource _MEMChip_B0_1_CASH = (ucNumTMU == 0) ? U12_CASH : U11_CASH;
|
||||
const def_eFaultSource _MEMChip_B0_2_CASH = (ucNumTMU == 0) ? U18_CASH : U16_CASH;
|
||||
const def_eFaultSource _MEMChip_B0_3_CASH = (ucNumTMU == 0) ? U17_CASH : U15_CASH;
|
||||
const def_eFaultSource _MEMChip_B1_0_CASH = (ucNumTMU == 0) ? U23_CASH : U27_CASH;
|
||||
const def_eFaultSource _MEMChip_B1_1_CASH = (ucNumTMU == 0) ? U24_CASH : U28_CASH;
|
||||
const def_eFaultSource _MEMChip_B1_2_CASH = (ucNumTMU == 0) ? U25_CASH : U29_CASH;
|
||||
const def_eFaultSource _MEMChip_B1_3_CASH = (ucNumTMU == 0) ? U26_CASH : U30_CASH;
|
||||
const def_eFaultSource MEMChip_0_CASH = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_0_CASH : _MEMChip_B1_0_CASH;
|
||||
const def_eFaultSource MEMChip_1_CASH = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_1_CASH : _MEMChip_B1_1_CASH;
|
||||
const def_eFaultSource MEMChip_2_CASH = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_2_CASH : _MEMChip_B1_2_CASH;
|
||||
const def_eFaultSource MEMChip_3_CASH = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_3_CASH : _MEMChip_B1_3_CASH;
|
||||
|
||||
const def_eFaultSource _MEMChip_B0_0_RAS = (ucNumTMU == 0) ? U14_RAS : U13_RAS;
|
||||
const def_eFaultSource _MEMChip_B0_1_RAS = (ucNumTMU == 0) ? U12_RAS : U11_RAS;
|
||||
const def_eFaultSource _MEMChip_B0_2_RAS = (ucNumTMU == 0) ? U18_RAS : U16_RAS;
|
||||
const def_eFaultSource _MEMChip_B0_3_RAS = (ucNumTMU == 0) ? U17_RAS : U15_RAS;
|
||||
const def_eFaultSource _MEMChip_B1_0_RAS = (ucNumTMU == 0) ? U23_RAS : U27_RAS;
|
||||
const def_eFaultSource _MEMChip_B1_1_RAS = (ucNumTMU == 0) ? U24_RAS : U28_RAS;
|
||||
const def_eFaultSource _MEMChip_B1_2_RAS = (ucNumTMU == 0) ? U25_RAS : U29_RAS;
|
||||
const def_eFaultSource _MEMChip_B1_3_RAS = (ucNumTMU == 0) ? U26_RAS : U30_RAS;
|
||||
const def_eFaultSource MEMChip_0_RAS = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_0_RAS : _MEMChip_B1_0_RAS;
|
||||
const def_eFaultSource MEMChip_1_RAS = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_1_RAS : _MEMChip_B1_1_RAS;
|
||||
const def_eFaultSource MEMChip_2_RAS = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_2_RAS : _MEMChip_B1_2_RAS;
|
||||
const def_eFaultSource MEMChip_3_RAS = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_3_RAS : _MEMChip_B1_3_RAS;
|
||||
|
||||
const def_eFaultSource _MEMChip_B0_0_WE = (ucNumTMU == 0) ? U14_WE : U13_WE;
|
||||
const def_eFaultSource _MEMChip_B0_1_WE = (ucNumTMU == 0) ? U12_WE : U11_WE;
|
||||
const def_eFaultSource _MEMChip_B0_2_WE = (ucNumTMU == 0) ? U18_WE : U16_WE;
|
||||
const def_eFaultSource _MEMChip_B0_3_WE = (ucNumTMU == 0) ? U17_WE : U15_WE;
|
||||
const def_eFaultSource _MEMChip_B1_0_WE = (ucNumTMU == 0) ? U23_WE : U27_WE;
|
||||
const def_eFaultSource _MEMChip_B1_1_WE = (ucNumTMU == 0) ? U24_WE : U28_WE;
|
||||
const def_eFaultSource _MEMChip_B1_2_WE = (ucNumTMU == 0) ? U25_WE : U29_WE;
|
||||
const def_eFaultSource _MEMChip_B1_3_WE = (ucNumTMU == 0) ? U26_WE : U30_WE;
|
||||
const def_eFaultSource MEMChip_0_WE = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_0_WE : _MEMChip_B1_0_WE;
|
||||
const def_eFaultSource MEMChip_1_WE = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_1_WE : _MEMChip_B1_1_WE;
|
||||
const def_eFaultSource MEMChip_2_WE = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_2_WE : _MEMChip_B1_2_WE;
|
||||
const def_eFaultSource MEMChip_3_WE = (add_list[idxdraw].nBank == 0) ? _MEMChip_B0_3_WE : _MEMChip_B1_3_WE;
|
||||
|
||||
const def_eFaultSource _RES_RAS0 = (ucNumTMU == 0) ? R118 : R115;
|
||||
const def_eFaultSource _RES_RAS1 = (ucNumTMU == 0) ? R149 : R150;
|
||||
const def_eFaultSource RES_RAS = (add_list[idxdraw].nBank == 0) ? _RES_RAS0 : _RES_RAS1;
|
||||
const def_eFaultSource RES_CAS = (ucNumTMU == 0) ? RA36 : RA32;
|
||||
const def_eFaultSource RES_WE = (ucNumTMU == 0) ? R117 : R114;
|
||||
|
||||
const def_eFaultSource RES_TEXADDR_0_L = (ucNumTMU == 0) ? RA35 : RA31;
|
||||
const def_eFaultSource RES_TEXADDR_0_H = (ucNumTMU == 0) ? RA34 : RA30;
|
||||
const def_eFaultSource RES_TEXADDR_0_8 = (ucNumTMU == 0) ? R116 : R113;
|
||||
const def_eFaultSource RES_TEXADDR_1_L = (ucNumTMU == 0) ? RA26 : RA25;
|
||||
const def_eFaultSource RES_TEXADDR_1_H = (ucNumTMU == 0) ? RA24 : RA23;
|
||||
const def_eFaultSource RES_TEXADDR_1_8 = (ucNumTMU == 0) ? R102 : R101;
|
||||
const def_eFaultSource RES_TEXADDR_2_L = (ucNumTMU == 0) ? RA33 : RA29;
|
||||
const def_eFaultSource RES_TEXADDR_2_H = (ucNumTMU == 0) ? RA28 : RA27;
|
||||
const def_eFaultSource RES_TEXADDR_2_8 = (ucNumTMU == 0) ? R112 : R111;
|
||||
const def_eFaultSource RES_TEXADDR_3_L = (ucNumTMU == 0) ? RA22 : RA20;
|
||||
const def_eFaultSource RES_TEXADDR_3_H = (ucNumTMU == 0) ? RA21 : RA19;
|
||||
const def_eFaultSource RES_TEXADDR_3_8 = (ucNumTMU == 0) ? R98 : R97;
|
||||
|
||||
|
||||
if(count_bit32(ErrorMark_L1 & 0x0000FFFF) > 2)
|
||||
{
|
||||
NbErr++;
|
||||
/*
|
||||
printf("1: %08x %d\n",
|
||||
ErrorMark_L1 & 0x0000FFFF,
|
||||
count_bit32(ErrorMark_L1 & 0x0000FFFF));*/
|
||||
if((idxdraw == idx) && count_bit32(ErrorMark_L1 & 0x0000FFFF) > 6)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexWE, 1.0/4);
|
||||
FaultSource_AddScore( RES_WE, 1.0/4);
|
||||
FaultSource_AddScore( MEMChip_0_WE, 1.0/1);
|
||||
}
|
||||
|
||||
if(count_bit32(ErrorMarkBlank_L1 & 0x0000FFFF) < 3)
|
||||
{
|
||||
if(add_list[idx].nColBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_0_A0 + add_list[idx].nColBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_0_0 + add_list[idx].nColBit, 1.0/1);
|
||||
if(add_list[idx].nColBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_0_L + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nColBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_0_H + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_0_8 + 1, 1.0/2);
|
||||
}
|
||||
|
||||
if(add_list[idx].nRowBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_0_A0 + add_list[idx].nRowBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_0_0 + add_list[idx].nRowBit, 1.0/1);
|
||||
if(add_list[idx].nRowBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_0_L + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nRowBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_0_H + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_0_8 + 1, 1.0/2);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
FaultSource_AddScore( TMUTexRASCurrent, 1.0/8);
|
||||
FaultSource_AddScore( RES_RAS, 1.0/8);
|
||||
FaultSource_AddScore( MEMChip_0_RAS, 1.0/4);
|
||||
|
||||
if(ErrorMark_L1 & 0x000000FF)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS0, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+1, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_0_CASL, 1.0/8);
|
||||
}
|
||||
if(ErrorMark_L1 & 0x0000FF00)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS1, 1.0/16);;
|
||||
FaultSource_AddScore( RES_CAS+2, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_0_CASH, 1.0/8);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
// Error only if more than 6/16 bits are in error
|
||||
if(count_bit32(ErrorMark_L1 & 0xFFFF0000) > 2)
|
||||
{
|
||||
NbErr++;/*
|
||||
printf("2: %08x %d\n",
|
||||
ErrorMark_L1 & 0xFFFF0000,
|
||||
count_bit32(ErrorMark_L1 & 0xFFFF0000));*/
|
||||
if((idxdraw == idx) && count_bit32(ErrorMark_L1 & 0xFFFF0000) > 6)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexWE, 1.0/4);
|
||||
FaultSource_AddScore( RES_WE, 1.0/4);
|
||||
FaultSource_AddScore( MEMChip_1_WE, 1.0/1);
|
||||
}
|
||||
if(count_bit32(ErrorMarkBlank_L1 & 0xFFFF0000) < 3)
|
||||
{
|
||||
if(add_list[idx].nColBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_1_A0 + add_list[idx].nColBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_1_0 + add_list[idx].nColBit, 1.0/1);
|
||||
if(add_list[idx].nColBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_1_L + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nColBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_1_H + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_1_8 + 1, 1.0/2);
|
||||
}
|
||||
|
||||
if(add_list[idx].nRowBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_1_A0 + add_list[idx].nRowBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_1_0 + add_list[idx].nRowBit, 1.0/1);
|
||||
if(add_list[idx].nRowBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_1_L + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nRowBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_1_H + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_1_8 + 1, 1.0/2);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
FaultSource_AddScore( TMUTexRASCurrent, 1.0/8);
|
||||
FaultSource_AddScore( RES_RAS, 1.0/8);
|
||||
FaultSource_AddScore( MEMChip_1_RAS, 1.0/4);
|
||||
|
||||
if(ErrorMark_L1 & 0x00FF0000)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS0, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+1, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_1_CASL, 1.0/8);
|
||||
}
|
||||
|
||||
if(ErrorMark_L1 & 0xFF000000)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS1, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+2, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_1_CASH, 1.0/8);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(count_bit32(ErrorMark_L2 & 0x0000FFFF) > 2)
|
||||
{
|
||||
NbErr++;/*
|
||||
printf("3: %08x %d\n",
|
||||
ErrorMark_L2 & 0x0000FFFF,
|
||||
count_bit32(ErrorMark_L2 & 0x0000FFFF));*/
|
||||
if((idxdraw == idx) && count_bit32(ErrorMark_L2 & 0x0000FFFF) > 6)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexWE, 1.0/4);
|
||||
FaultSource_AddScore( RES_WE, 1.0/4);
|
||||
FaultSource_AddScore( MEMChip_2_WE, 1.0);
|
||||
}
|
||||
|
||||
if(count_bit32(ErrorMarkBlank_L2 & 0x0000FFFF) < 3)
|
||||
{
|
||||
if(add_list[idx].nColBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_2_A0 + add_list[idx].nColBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_2_0 + add_list[idx].nColBit, 1.0/1);
|
||||
if(add_list[idx].nColBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_2_L + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nColBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_2_H + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_2_8 + 1, 1.0/2);
|
||||
}
|
||||
|
||||
if(add_list[idx].nRowBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_2_A0 + add_list[idx].nRowBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_2_0 + add_list[idx].nRowBit, 1.0/1);
|
||||
if(add_list[idx].nRowBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_2_L + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nRowBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_2_H + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_2_8 + 1, 1.0/2);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
FaultSource_AddScore( TMUTexRASCurrent, 1.0/8);
|
||||
FaultSource_AddScore( RES_RAS, 1.0/8);
|
||||
FaultSource_AddScore( MEMChip_2_RAS, 1.0/4);
|
||||
|
||||
if(ErrorMark_L2 & 0x000000FF)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS2, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+3, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_2_CASL, 1.0/8);
|
||||
}
|
||||
|
||||
if(ErrorMark_L2 & 0x0000FF00)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS3, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+4, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_2_CASH, 1.0/8);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(count_bit32(ErrorMark_L2 & 0xFFFF0000) > 2)
|
||||
{
|
||||
NbErr++;/*
|
||||
printf("4: %08x %d\n",
|
||||
ErrorMark_L2 & 0xFFFF0000,
|
||||
count_bit32(ErrorMark_L2 & 0xFFFF0000));*/
|
||||
if((idxdraw == idx) && count_bit32(ErrorMark_L2 & 0xFFFF0000) > 6)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexWE, 1.0/4);
|
||||
FaultSource_AddScore( RES_WE, 1.0/4);
|
||||
FaultSource_AddScore( MEMChip_3_WE, 1.0);
|
||||
}
|
||||
|
||||
if(count_bit32(ErrorMarkBlank_L2 & 0xFFFF0000) < 3)
|
||||
{
|
||||
if(add_list[idx].nColBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_3_A0 + add_list[idx].nColBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_3_0 + add_list[idx].nColBit, 1.0/1);
|
||||
if(add_list[idx].nColBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_3_L + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nColBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_3_H + add_list[idx].nColBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_3_8 + 1, 1.0/2);
|
||||
}
|
||||
|
||||
if(add_list[idx].nRowBit!=0)
|
||||
{
|
||||
FaultSource_AddScore( MEMChip_3_A0 + add_list[idx].nRowBit, 1.0/1);
|
||||
FaultSource_AddScore( TMUTexADDR_3_0 + add_list[idx].nRowBit, 1.0/1);
|
||||
if(add_list[idx].nRowBit < 4)
|
||||
FaultSource_AddScore( RES_TEXADDR_3_L + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else if(add_list[idx].nRowBit < 8)
|
||||
FaultSource_AddScore( RES_TEXADDR_3_H + add_list[idx].nRowBit + 1, 1.0/2);
|
||||
else
|
||||
FaultSource_AddScore( RES_TEXADDR_3_8 + 1, 1.0/2);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
FaultSource_AddScore( TMUTexRASCurrent, 1.0/8);
|
||||
FaultSource_AddScore( RES_RAS, 1.0/8);
|
||||
FaultSource_AddScore( MEMChip_3_RAS, 1.0/4);
|
||||
|
||||
if(ErrorMark_L2 & 0x00FF0000)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS2, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+3, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_3_CASL, 1.0/8);
|
||||
}
|
||||
|
||||
if(ErrorMark_L2 & 0xFF000000)
|
||||
{
|
||||
FaultSource_AddScore( TMUTexCAS3, 1.0/16);
|
||||
FaultSource_AddScore( RES_CAS+4, 1.0/16);
|
||||
FaultSource_AddScore( MEMChip_3_CASH, 1.0/8);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
/*
|
||||
if(idxdraw == idx)
|
||||
{
|
||||
if(ErrorMark_L1)
|
||||
{
|
||||
printf("E (31..00): @%08x, read %08x, expected %08x !\n" ,
|
||||
add_list[idxdraw].u32Addr,
|
||||
L1 ,
|
||||
TestVal1);
|
||||
}
|
||||
if(ErrorMark_L2)
|
||||
{
|
||||
printf("E (63..32): @%08x, read %08x, expected %08x !\n" ,
|
||||
add_list[idxdraw].u32Addr,
|
||||
L2 ,
|
||||
TestVal2);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(ErrorMark_L1)
|
||||
{
|
||||
printf("E (31..00)(trash) : @%08x, read %08x, expected %08x !\n" ,
|
||||
add_list[idxdraw].u32Addr,
|
||||
L1 ,
|
||||
TestValBlank1);
|
||||
}
|
||||
if(ErrorMark_L2)
|
||||
{
|
||||
printf("E (63..32)(trash) : @%08x, read %08x, expected %08x !\n" ,
|
||||
add_list[idxdraw].u32Addr,
|
||||
L2 ,
|
||||
TestValBlank2);
|
||||
}
|
||||
}
|
||||
|
||||
if(!ErrorMark_L1 && !ErrorMark_L2)
|
||||
{
|
||||
printf("OK !!\n");
|
||||
}
|
||||
*/
|
||||
|
||||
|
||||
//printf("@ %08x done\n",add_list[idx]);
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sst,ucNumTMU)->trexInit0, devInfo->tmuInit0[(int)ucNumTMU]);
|
||||
sst1InitIdle(sst);
|
||||
return NbErr;
|
||||
}
|
||||
11
Test_Address.h
Normal file
11
Test_Address.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef _DEF_TEST_ADDRESS_H_
|
||||
#define _DEF_TEST_ADDRESS_H_
|
||||
|
||||
unsigned long
|
||||
RenderTestAddress( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const char ucNumTMU,
|
||||
const unsigned char RamSizeMB);
|
||||
|
||||
#endif //_DEF_TEST_ADDRESS_H_
|
||||
661
Test_Data.c
Normal file
661
Test_Data.c
Normal file
@@ -0,0 +1,661 @@
|
||||
#include <cvg.h>
|
||||
#include <fxpci.h>
|
||||
#include <sst1init.h>
|
||||
#include <3dfx.h>
|
||||
#include <glide.h>
|
||||
|
||||
#include "FaultSources.h"
|
||||
#include "Utils.h"
|
||||
#include "Draw.h"
|
||||
|
||||
#include "Test_Data.h"
|
||||
|
||||
static unsigned long long
|
||||
RenderTest( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const char ucNumTMU,
|
||||
const FxU32 mem,
|
||||
const FxU32 value1,
|
||||
const FxU32 value2)
|
||||
{
|
||||
|
||||
/* set the Init0 register to enable ? MBytes of memory */
|
||||
// info->tmuInit0[tmu] = SST_TREXINIT0_DEFAULT | BIT(20); // BIT(20) seems to use bank 2...even if TMU mem is <= 2MB
|
||||
|
||||
devInfo->tmuInit0[(int)ucNumTMU] = SST_TREXINIT0_DEFAULT ;
|
||||
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sstregs,ucNumTMU)->trexInit0, devInfo->tmuInit0[(int)ucNumTMU]);
|
||||
sst1InitIdle(sst);
|
||||
/*
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sstregs,ucNumTMU)->trexInit0, 0x5000 | (devInfo->tmuInit0[(int)ucNumTMU] & ~0x7000));
|
||||
sst1InitIdle(sst);
|
||||
*/
|
||||
ISET(sstregs->texBaseAddr, (mem>>3)); /* set to mem addr */
|
||||
|
||||
// First line, to use bits 0..31
|
||||
volatile const FxU32 *texAddr = (ucNumTMU<<(21-2)) + (((FxU32)0)<<(17-2)) + (FxU32 *)SST_TEX_ADDRESS(sstregs);
|
||||
ISET(texAddr[0], value1); /* write a value */
|
||||
ISET(texAddr[1], value1+1); /* write a value */
|
||||
ISET(texAddr[2], value1+2); /* write a value */
|
||||
ISET(texAddr[3], value1+3); /* write a value */
|
||||
|
||||
// Second line, to use bits 32..63
|
||||
volatile const FxU32 *texAddr2 = (ucNumTMU<<(21-2)) + (((FxU32)0)<<(17-2)) + (1<<(9-2))+ (FxU32 *)SST_TEX_ADDRESS(sstregs);
|
||||
ISET(texAddr2[0], value2); /* write a value */
|
||||
ISET(texAddr2[1], value2+1); /* write a value */
|
||||
ISET(texAddr2[2], value2+2); /* write a value */
|
||||
ISET(texAddr2[3], value2+3); /* write a value */
|
||||
|
||||
drawTriangle(sstregs,0,0,10); /* draw a 10x10 triangle */
|
||||
|
||||
// First line pixels addresses
|
||||
const FxU32 L1_1 = IGET(sst[(SST_LFB_ADDR>>2)+0]);
|
||||
const FxU32 L1_2 = IGET(sst[(SST_LFB_ADDR>>2)+1]);
|
||||
const FxU32 L1_3 = IGET(sst[(SST_LFB_ADDR>>2)+2]);
|
||||
const FxU32 L1_4 = IGET(sst[(SST_LFB_ADDR>>2)+3]);
|
||||
|
||||
// Second line pixels addresses
|
||||
const FxU32 L2_1 = IGET(sst[(SST_LFB_ADDR>>2)+(2048>>2)+0]);
|
||||
const FxU32 L2_2 = IGET(sst[(SST_LFB_ADDR>>2)+(2048>>2)+1]);
|
||||
const FxU32 L2_3 = IGET(sst[(SST_LFB_ADDR>>2)+(2048>>2)+2]);
|
||||
const FxU32 L2_4 = IGET(sst[(SST_LFB_ADDR>>2)+(2048>>2)+3]);
|
||||
|
||||
unsigned long long NbErr = 0;
|
||||
//unsigned char bErrLowBytes=0;
|
||||
//unsigned char bErrHighBytes=0;
|
||||
if( L1_1 != value1)
|
||||
{
|
||||
//printf("Error on pixel LFB[0][0] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrLowBytes=1;
|
||||
}
|
||||
if( L1_2 != value1+1)
|
||||
{
|
||||
//printf("Error on pixel LFB[0][1] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrLowBytes=1;
|
||||
}
|
||||
if( L1_3 != value1+2)
|
||||
{
|
||||
//printf("Error on pixel LFB[0][2] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrLowBytes=1;
|
||||
}
|
||||
if( L1_4 != value1+3)
|
||||
{
|
||||
//printf("Error on pixel LFB[0][3] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrLowBytes=1;
|
||||
}
|
||||
|
||||
if( L2_1 != value2)
|
||||
{
|
||||
//printf("Error on pixel LFB[1][0] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrHighBytes=1;
|
||||
}
|
||||
if( L2_2 != value2+1)
|
||||
{
|
||||
//printf("Error on pixel LFB[1][1] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrHighBytes=1;
|
||||
}
|
||||
if( L2_3 != value2+2)
|
||||
{
|
||||
//printf("Error on pixel LFB[1][2] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrHighBytes=1;
|
||||
}
|
||||
if( L2_4 != value2+3)
|
||||
{
|
||||
//printf("Error on pixel LFB[1][3] (0x%08x)!\n",mem);
|
||||
NbErr++;
|
||||
//bErrHighBytes=1;
|
||||
}
|
||||
|
||||
// Diag Help logs
|
||||
|
||||
const unsigned long ErrorMark_L1_1 = L1_1 ^ ( value1 + 0 );
|
||||
const unsigned long ErrorMark_L1_2 = L1_2 ^ ( value1 + 1 );
|
||||
const unsigned long ErrorMark_L1_3 = L1_3 ^ ( value1 + 2 );
|
||||
const unsigned long ErrorMark_L1_4 = L1_4 ^ ( value1 + 3 );
|
||||
const unsigned long ErrorMark_L2_1 = L2_1 ^ ( value2 + 0 );
|
||||
const unsigned long ErrorMark_L2_2 = L2_2 ^ ( value2 + 1 );
|
||||
const unsigned long ErrorMark_L2_3 = L2_3 ^ ( value2 + 2 );
|
||||
const unsigned long ErrorMark_L2_4 = L2_4 ^ ( value2 + 3 );
|
||||
|
||||
WordBitFaultSet(ErrorMark_L1_1, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 1.0/16, U9_TMU0_TF_DATA_0, U9_TMU0_TF_DATA_0);
|
||||
|
||||
WordBitFaultSet(ErrorMark_L1_1, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 1.0/16, TT_TDATA_R131, TT_TDATA_R131);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_1 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_2 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_3 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L1_4 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_1 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_2 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_3 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 0, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 4, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 8, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 12, 1.0/16, RA13_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 16, 1.0/16, RA10_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 20, 1.0/16, RA11_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 24, 1.0/16, RA12_1);
|
||||
QuartetBitFaultSet(ErrorMark_L2_4 >> 28, 1.0/16, RA13_1);
|
||||
|
||||
const double dScoreFront = (mem >= 0x200000) ? 0.5/4 : 1.0/4;
|
||||
const double dScoreBack = (mem >= 0x200000) ? 1.0/4 : 0.5/4;
|
||||
|
||||
if(ucNumTMU == 0)
|
||||
{
|
||||
WordBitFaultSet(ErrorMark_L1_1, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 1.0/16, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L1_1, dScoreFront, U14, U12);
|
||||
MemChipDQFaultSet(ErrorMark_L1_2, dScoreFront, U14, U12);
|
||||
MemChipDQFaultSet(ErrorMark_L1_3, dScoreFront, U14, U12);
|
||||
MemChipDQFaultSet(ErrorMark_L1_4, dScoreFront, U14, U12);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L2_1, dScoreFront, U18, U17);
|
||||
MemChipDQFaultSet(ErrorMark_L2_2, dScoreFront, U18, U17);
|
||||
MemChipDQFaultSet(ErrorMark_L2_3, dScoreFront, U18, U17);
|
||||
MemChipDQFaultSet(ErrorMark_L2_4, dScoreFront, U18, U17);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L1_1, dScoreBack, U23, U24);
|
||||
MemChipDQFaultSet(ErrorMark_L1_2, dScoreBack, U23, U24);
|
||||
MemChipDQFaultSet(ErrorMark_L1_3, dScoreBack, U23, U24);
|
||||
MemChipDQFaultSet(ErrorMark_L1_4, dScoreBack, U23, U12);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L2_1, dScoreBack, U25, U26);
|
||||
MemChipDQFaultSet(ErrorMark_L2_2, dScoreBack, U25, U26);
|
||||
MemChipDQFaultSet(ErrorMark_L2_3, dScoreBack, U25, U26);
|
||||
MemChipDQFaultSet(ErrorMark_L2_4, dScoreBack, U25, U26);
|
||||
|
||||
TMUTexDataFaultSet(ErrorMark_L1_1, ErrorMark_L2_1, 1.0/4, U9_TMU0);
|
||||
TMUTexDataFaultSet(ErrorMark_L1_2, ErrorMark_L2_2, 1.0/4, U9_TMU0);
|
||||
TMUTexDataFaultSet(ErrorMark_L1_3, ErrorMark_L2_3, 1.0/4, U9_TMU0);
|
||||
TMUTexDataFaultSet(ErrorMark_L1_4, ErrorMark_L2_4, 1.0/4, U9_TMU0);
|
||||
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_1,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS0,
|
||||
U9_TMU0_TEX_CAS1,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_2,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS0,
|
||||
U9_TMU0_TEX_CAS1,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_3,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS0,
|
||||
U9_TMU0_TEX_CAS1,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_4,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS0,
|
||||
U9_TMU0_TEX_CAS1,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_1,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS2,
|
||||
U9_TMU0_TEX_CAS3,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_2,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS2,
|
||||
U9_TMU0_TEX_CAS3,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_3,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS2,
|
||||
U9_TMU0_TEX_CAS3,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_4,
|
||||
1.0/4,
|
||||
U9_TMU0_TEX_CAS2,
|
||||
U9_TMU0_TEX_CAS3,
|
||||
mem < 0x200000 ? U9_TMU0_TEX_RAS0 : U9_TMU0_TEX_RAS1,
|
||||
U9_TMU0_TEX_WE);
|
||||
|
||||
}
|
||||
else if(ucNumTMU == 1)
|
||||
{
|
||||
/* during TMU1 test, TMU0 doesnt receive any textures => ignoring these
|
||||
WordBitFaultSet(ErrorMark_L1_1, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 0.5, U9_TMU0_FT_DATA_0, U9_TMU0_FT_DATA_0);
|
||||
*/
|
||||
|
||||
// U9_TMU0_TT_DATA_x is only tested when using TMU1
|
||||
WordBitFaultSet(ErrorMark_L1_1, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 1.0/16, U9_TMU0_TT_DATA_0, U9_TMU0_TT_DATA_0);
|
||||
|
||||
WordBitFaultSet(ErrorMark_L1_1, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 1.0/16, U8_TMU1_TF_DATA_0, U8_TMU1_TF_DATA_0);
|
||||
|
||||
WordBitFaultSet(ErrorMark_L1_1, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_2, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_3, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L1_4, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_1, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_2, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_3, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
WordBitFaultSet(ErrorMark_L2_4, 1.0/16, U8_TMU1_FT_DATA_0, U8_TMU1_FT_DATA_0);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L1_1, dScoreFront, U13, U11);
|
||||
MemChipDQFaultSet(ErrorMark_L1_2, dScoreFront, U13, U11);
|
||||
MemChipDQFaultSet(ErrorMark_L1_3, dScoreFront, U13, U11);
|
||||
MemChipDQFaultSet(ErrorMark_L1_4, dScoreFront, U13, U11);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L2_1, dScoreFront, U16, U15);
|
||||
MemChipDQFaultSet(ErrorMark_L2_2, dScoreFront, U16, U15);
|
||||
MemChipDQFaultSet(ErrorMark_L2_3, dScoreFront, U16, U15);
|
||||
MemChipDQFaultSet(ErrorMark_L2_4, dScoreFront, U16, U15);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L1_1, dScoreBack, U27, U28);
|
||||
MemChipDQFaultSet(ErrorMark_L1_2, dScoreBack, U27, U28);
|
||||
MemChipDQFaultSet(ErrorMark_L1_3, dScoreBack, U27, U28);
|
||||
MemChipDQFaultSet(ErrorMark_L1_4, dScoreBack, U27, U28);
|
||||
|
||||
MemChipDQFaultSet(ErrorMark_L2_1, dScoreBack, U29, U30);
|
||||
MemChipDQFaultSet(ErrorMark_L2_2, dScoreBack, U29, U30);
|
||||
MemChipDQFaultSet(ErrorMark_L2_3, dScoreBack, U29, U30);
|
||||
MemChipDQFaultSet(ErrorMark_L2_4, dScoreBack, U29, U30);
|
||||
|
||||
TMUTexDataFaultSet(ErrorMark_L1_1, ErrorMark_L2_1, 1.0/4, U8_TMU1);
|
||||
TMUTexDataFaultSet(ErrorMark_L1_2, ErrorMark_L2_2, 1.0/4, U8_TMU1);
|
||||
TMUTexDataFaultSet(ErrorMark_L1_3, ErrorMark_L2_3, 1.0/4, U8_TMU1);
|
||||
TMUTexDataFaultSet(ErrorMark_L1_4, ErrorMark_L2_4, 1.0/4, U8_TMU1);
|
||||
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_1,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS0,
|
||||
U8_TMU1_TEX_CAS1,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_2,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS0,
|
||||
U8_TMU1_TEX_CAS1,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_3,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS0,
|
||||
U8_TMU1_TEX_CAS1,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L1_4,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS0,
|
||||
U8_TMU1_TEX_CAS1,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_1,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS2,
|
||||
U8_TMU1_TEX_CAS3,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_2,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS2,
|
||||
U8_TMU1_TEX_CAS3,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_3,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS2,
|
||||
U8_TMU1_TEX_CAS3,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE);
|
||||
TMUTexDataCtrlFaultSet( ErrorMark_L2_4,
|
||||
1.0/4,
|
||||
U8_TMU1_TEX_CAS2,
|
||||
U8_TMU1_TEX_CAS3,
|
||||
mem < 0x200000 ? U8_TMU1_TEX_RAS0 : U8_TMU1_TEX_RAS1,
|
||||
U8_TMU1_TEX_WE );
|
||||
}
|
||||
|
||||
/*
|
||||
if( NbErr )
|
||||
{
|
||||
printf("============\n");
|
||||
if(L1_1 != value1+0)
|
||||
{
|
||||
printf( "LFB[0][0] is 0x%08x [expected 0x%08x] !\n", L1_1, value1+0);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L1_1, 31, 0);
|
||||
printf( "\n");
|
||||
}
|
||||
if(L1_2 != value1+1)
|
||||
{
|
||||
printf( "LFB[0][1] is 0x%08x [expected 0x%08x] !\n", L1_2, value1+1);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L1_2, 31, 0);
|
||||
printf( "\n");
|
||||
}
|
||||
if(L1_3 != value1+2)
|
||||
{
|
||||
printf( "LFB[0][2] is 0x%08x [expected 0x%08x] !\n", L1_3, value1+2);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L1_3, 31, 0);
|
||||
printf( "\n");
|
||||
}
|
||||
if(L1_4!= value1+3)
|
||||
{
|
||||
printf( "LFB[0][3] is 0x%08x [expected 0x%08x] !\n", L1_4, value1+3);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L1_4, 31, 0);
|
||||
printf( "\n");
|
||||
}
|
||||
|
||||
if(L2_1 != value2+0)
|
||||
{
|
||||
printf( "LFB[1][0] is 0x%08x [expected 0x%08x] !\n", L2_1, value2+0);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L2_1, 63, 21);
|
||||
printf( "\n");
|
||||
}
|
||||
if(L2_2 != value2+1)
|
||||
{
|
||||
printf( "LFB[1][1] is 0x%08x [expected 0x%08x] !\n", L2_2, value2+1);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L2_2, 63, 21);
|
||||
printf( "\n");
|
||||
}
|
||||
if(L2_3 != value2+2)
|
||||
{
|
||||
printf( "LFB[1][2] is 0x%08x [expected 0x%08x] !\n", L2_3, value2+2);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L2_3, 63, 21);
|
||||
printf( "\n");
|
||||
}
|
||||
if(L2_4!= value2+3)
|
||||
{
|
||||
printf( "LFB[1][3] is 0x%08x [expected 0x%08x] !\n", L2_4, value2+3);
|
||||
printf( "Faulty bits :\n");
|
||||
printbin32Info(ErrorMark_L2_4, 63, 21);
|
||||
printf( "\n");
|
||||
}
|
||||
|
||||
if(bErrLowBytes)
|
||||
{
|
||||
if(tmu == 0)
|
||||
{
|
||||
if( (ErrorMark_L1_1 & 0xFFFF)
|
||||
|| (ErrorMark_L1_2 & 0xFFFF)
|
||||
|| (ErrorMark_L1_3 & 0xFFFF)
|
||||
|| (ErrorMark_L1_4 & 0xFFFF) )
|
||||
{
|
||||
printf("Check DQ connections to/from U14 (front) and U23 (back)\n");
|
||||
}
|
||||
|
||||
if( (ErrorMark_L1_1 & 0xFFFF0000)
|
||||
|| (ErrorMark_L1_2 & 0xFFFF0000)
|
||||
|| (ErrorMark_L1_3 & 0xFFFF0000)
|
||||
|| (ErrorMark_L1_4 & 0xFFFF0000) )
|
||||
{
|
||||
printf("Check DQ connections to/from U12 (front) and U24 (back)\n");
|
||||
}
|
||||
}
|
||||
else if(tmu == 1)
|
||||
{
|
||||
if( (ErrorMark_L1_1 & 0xFFFF)
|
||||
|| (ErrorMark_L1_2 & 0xFFFF)
|
||||
|| (ErrorMark_L1_3 & 0xFFFF)
|
||||
|| (ErrorMark_L1_4 & 0xFFFF) )
|
||||
{
|
||||
printf("Check DQ connections to/from U13 (front) and U27 (back)\n");
|
||||
}
|
||||
|
||||
if( (ErrorMark_L1_1 & 0xFFFF0000)
|
||||
|| (ErrorMark_L1_2 & 0xFFFF0000)
|
||||
|| (ErrorMark_L1_3 & 0xFFFF0000)
|
||||
|| (ErrorMark_L1_4 & 0xFFFF0000) )
|
||||
{
|
||||
printf("Check DQ connections to/from U11 (front) and U28 (back)\n");
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
if(bErrHighBytes)
|
||||
{
|
||||
if(ucNumTMU == 0)
|
||||
{
|
||||
if( (ErrorMark_L2_1 & 0xFFFF)
|
||||
|| (ErrorMark_L2_2 & 0xFFFF)
|
||||
|| (ErrorMark_L2_3 & 0xFFFF)
|
||||
|| (ErrorMark_L2_4 & 0xFFFF) )
|
||||
{
|
||||
printf("Check DQ connections to/from U18 (front) and U25 (back)\n");
|
||||
}
|
||||
|
||||
if( (ErrorMark_L2_1 & 0xFFFF0000)
|
||||
|| (ErrorMark_L2_2 & 0xFFFF0000)
|
||||
|| (ErrorMark_L2_3 & 0xFFFF0000)
|
||||
|| (ErrorMark_L2_4 & 0xFFFF0000) )
|
||||
{
|
||||
printf("Check DQ connections to/from U17 (front) and U26 (back)\n");
|
||||
}
|
||||
}
|
||||
else if(ucNumTMU == 1)
|
||||
{
|
||||
if( (ErrorMark_L2_1 & 0xFFFF)
|
||||
|| (ErrorMark_L2_2 & 0xFFFF)
|
||||
|| (ErrorMark_L2_3 & 0xFFFF)
|
||||
|| (ErrorMark_L2_4 & 0xFFFF) )
|
||||
{
|
||||
printf("Check DQ connections to/from U16 (front) and U29 (back)\n");
|
||||
}
|
||||
|
||||
if( (ErrorMark_L2_1 & 0xFFFF0000)
|
||||
|| (ErrorMark_L2_2 & 0xFFFF0000)
|
||||
|| (ErrorMark_L2_3 & 0xFFFF0000)
|
||||
|| (ErrorMark_L2_4 & 0xFFFF0000) )
|
||||
{
|
||||
printf("Check DQ connections to/from U15 (front) and U32 (back)\n");
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
}*/
|
||||
|
||||
/* reset the Init0 register back to its previous value */
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sst,ucNumTMU)->trexInit0, devInfo->tmuInit0[(int)ucNumTMU]);
|
||||
sst1InitIdle(sst);
|
||||
return NbErr;
|
||||
}
|
||||
|
||||
unsigned long long
|
||||
test_TMU_datalines( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const unsigned char ucNumTMU,
|
||||
const unsigned char bRandom,
|
||||
const unsigned char RamSizeMB)
|
||||
{
|
||||
typedef struct _def_sMemBlock{
|
||||
unsigned long ulAddStart;
|
||||
unsigned long ulAddEnd;
|
||||
unsigned long ulAddLength;
|
||||
}def_sMemBlock;
|
||||
|
||||
const def_sMemBlock ar_memBlocks[] = {
|
||||
{ .ulAddStart = 0x000000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
{ .ulAddStart = 0x100000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
{ .ulAddStart = 0x200000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
{ .ulAddStart = 0x300000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
};
|
||||
|
||||
unsigned long long ullNbErrorAll = 0;
|
||||
|
||||
// set downstream TMUs to passthrough
|
||||
for (int i=0; i<ucNumTMU; i++)
|
||||
ISET(SST_TREX(sstregs,i)->textureMode, SST_TC_PASS | SST_TCA_PASS);
|
||||
|
||||
for( int iMemBlock = 0;
|
||||
iMemBlock <= sizeof(ar_memBlocks)/sizeof(def_sMemBlock);
|
||||
iMemBlock++)
|
||||
{
|
||||
const def_sMemBlock* pMemBlk = &ar_memBlocks[iMemBlock];
|
||||
|
||||
if(RamSizeMB<4 && pMemBlk->ulAddStart >= 0x300000) continue;
|
||||
if(RamSizeMB<3 && pMemBlk->ulAddStart >= 0x200000) continue;
|
||||
if(RamSizeMB<2 && pMemBlk->ulAddStart >= 0x100000) continue;
|
||||
/*
|
||||
printf("Testing memory block 0x%08x to 0x%08x ...\n",
|
||||
pMemBlk->ulAddStart,
|
||||
pMemBlk->ulAddStart + pMemBlk->ulAddLength -4);
|
||||
*/
|
||||
unsigned char ucAddMovingBit = 0;
|
||||
for( FxU32 addrTest = pMemBlk->ulAddStart ;
|
||||
addrTest < (pMemBlk->ulAddStart + pMemBlk->ulAddLength);
|
||||
ucAddMovingBit++)
|
||||
{
|
||||
FxU32 bitTest = 1u;
|
||||
FxU32 bitTest2 = 1u<<31;
|
||||
for(unsigned long nloop=0;; nloop++)
|
||||
{
|
||||
unsigned long ulNbError;
|
||||
ulNbError = RenderTest( devInfo,
|
||||
sst,
|
||||
sstregs,
|
||||
ucNumTMU,
|
||||
addrTest,
|
||||
bitTest,
|
||||
bitTest2);
|
||||
ullNbErrorAll += ulNbError;
|
||||
|
||||
if((bRandom && (nloop > 32)) || bitTest == 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
bitTest = bRandom ? get_notnull_random_balanced_mByte() : (bitTest << 1);
|
||||
bitTest2 = bRandom ? get_notnull_random_balanced_mByte() : (bitTest2 >> 1);
|
||||
}
|
||||
//printf("Done @ 0x%08x\n",dataTest);
|
||||
|
||||
const FxU32 new_addrTest = pMemBlk->ulAddStart | (1 << ucAddMovingBit);
|
||||
if(new_addrTest == pMemBlk->ulAddStart) break;
|
||||
addrTest = new_addrTest;
|
||||
}
|
||||
}
|
||||
|
||||
return ullNbErrorAll;
|
||||
}
|
||||
12
Test_Data.h
Normal file
12
Test_Data.h
Normal file
@@ -0,0 +1,12 @@
|
||||
#ifndef _DEF_TEST_DATA_H_
|
||||
#define _DEF_TEST_DATA_H_
|
||||
|
||||
unsigned long long
|
||||
test_TMU_datalines( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const unsigned char ucNumTMU,
|
||||
const unsigned char bRandom,
|
||||
const unsigned char RamSizeMB);
|
||||
|
||||
#endif //_DEF_TEST_DATA_H_
|
||||
248
Test_Data_Huge.c
Normal file
248
Test_Data_Huge.c
Normal file
@@ -0,0 +1,248 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <time.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#include <cvg.h>
|
||||
#include <fxpci.h>
|
||||
#include <sst1init.h>
|
||||
#include <3dfx.h>
|
||||
#include <glide.h>
|
||||
|
||||
#include "FaultSources.h"
|
||||
#include "Utils.h"
|
||||
#include "Draw.h"
|
||||
|
||||
#include "Test_Data_Huge.h"
|
||||
|
||||
static unsigned long long
|
||||
RenderTest( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const char ucNumTMU,
|
||||
const FxU32 mem)
|
||||
{
|
||||
unsigned long NbErr = 0;
|
||||
|
||||
clock_t begin = clock();
|
||||
|
||||
ISET(sstregs->texBaseAddr, (mem>>3)); /* set to mem addr */
|
||||
|
||||
#define _DEF_NB_PIXEL_ROW 256
|
||||
#define _DEF_NB_PIXEL_COL 256
|
||||
|
||||
static unsigned short
|
||||
ar_u16Pixels[_DEF_NB_PIXEL_ROW][_DEF_NB_PIXEL_COL];
|
||||
static unsigned long
|
||||
ar_u16PixelsRaw[_DEF_NB_PIXEL_ROW][_DEF_NB_PIXEL_COL/2];
|
||||
static unsigned short
|
||||
ar_u16PixelsReRead[_DEF_NB_PIXEL_ROW][_DEF_NB_PIXEL_COL];
|
||||
|
||||
for(unsigned short iter_row = 0; iter_row < _DEF_NB_PIXEL_ROW; iter_row++)
|
||||
{
|
||||
for(unsigned short iter_col = 0; iter_col < _DEF_NB_PIXEL_COL; iter_col+=2)
|
||||
{
|
||||
const unsigned long NewData = get_notnull_random_balanced_mByte();
|
||||
ar_u16PixelsRaw[iter_row][iter_col/2] = NewData;
|
||||
ar_u16Pixels[iter_row][iter_col] = NewData >>16;
|
||||
ar_u16Pixels[iter_row][iter_col+1] = NewData & 0xFFFF;
|
||||
}
|
||||
}
|
||||
clock_t after_create = clock();
|
||||
|
||||
|
||||
volatile FxU32 *texRowAddr
|
||||
= (ucNumTMU<<(21-2)) + (((FxU32)0/*LOD0*/)<<(17-2))
|
||||
+ (FxU32 *)SST_TEX_ADDRESS(sstregs);
|
||||
|
||||
for(unsigned short iter_row = 0; iter_row < _DEF_NB_PIXEL_ROW; iter_row++)
|
||||
{
|
||||
for(unsigned short iter_col = 0; iter_col < _DEF_NB_PIXEL_COL/2; iter_col++)
|
||||
{
|
||||
//printf("writing %d\n",ar_u16PixelsRaw[iter_row][iter_col]);
|
||||
ISET(texRowAddr[iter_col], ar_u16PixelsRaw[iter_row][iter_col]);
|
||||
}
|
||||
texRowAddr += (1<<(9-2)); //jump to next line
|
||||
}
|
||||
clock_t after_write = clock();
|
||||
#define NB_CHECK_LOOP 3
|
||||
clock_t before_draw[NB_CHECK_LOOP];
|
||||
clock_t after_draw[NB_CHECK_LOOP];
|
||||
clock_t after_read[NB_CHECK_LOOP];
|
||||
clock_t after_check[NB_CHECK_LOOP];
|
||||
for(unsigned int i = 0; i<NB_CHECK_LOOP; i++)
|
||||
{
|
||||
//printf("draw/checking\n");
|
||||
before_draw[i] = clock();
|
||||
drawTriangle(sstregs, 0, 0, 512); /* draw a 252x512 triangle */
|
||||
after_draw[i] = clock();
|
||||
|
||||
/*
|
||||
printf("rdy.\n");
|
||||
GrLfbInfo_t info;
|
||||
if(grLfbLock( GR_LFB_READ_ONLY,
|
||||
GR_BUFFER_BACKBUFFER,
|
||||
GR_LFBWRITEMODE_ANY,
|
||||
GR_ORIGIN_UPPER_LEFT,
|
||||
FXFALSE,
|
||||
&info)
|
||||
)
|
||||
{
|
||||
printf("got LFB access.\n");
|
||||
FxU32 *rptr;
|
||||
rptr = info.lfbPtr;
|
||||
for(unsigned short iter_row = 0; iter_row < _DEF_NB_PIXEL_ROW; iter_row++)
|
||||
{
|
||||
for(unsigned short iter_col = 0; iter_col < _DEF_NB_PIXEL_COL; iter_col+=8)
|
||||
{
|
||||
ar_u16PixelsReRead[iter_row][iter_col] = *rptr >> 16;
|
||||
ar_u16PixelsReRead[iter_row][iter_col+1] = *rptr & 0xFFFF;
|
||||
rptr+=1;
|
||||
}
|
||||
rptr+=info.strideInBytes>>2;
|
||||
}
|
||||
grLfbUnlock(GR_LFB_READ_ONLY,GR_BUFFER_FRONTBUFFER);
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("NOT LFB access.\n");
|
||||
}
|
||||
*/
|
||||
volatile FxU32* pLFB = sst + (SST_LFB_ADDR>>2);
|
||||
for(unsigned short iter_row = 0; iter_row < _DEF_NB_PIXEL_ROW; iter_row++)
|
||||
{
|
||||
|
||||
//printf("reading row %d\n",iter_row);
|
||||
for(unsigned short iter_col = 0; iter_col < _DEF_NB_PIXEL_COL; iter_col+=2)
|
||||
{
|
||||
const FxU32 u32Data = *pLFB++;
|
||||
ar_u16PixelsReRead[iter_row][iter_col] = u32Data >> 16;
|
||||
ar_u16PixelsReRead[iter_row][iter_col+1] = u32Data & 0xFFFF;
|
||||
|
||||
//printf("read: %d\n",u32Data);
|
||||
}
|
||||
|
||||
pLFB += ((2048)>>2) - ((_DEF_NB_PIXEL_COL*2) >>2) ;
|
||||
|
||||
}
|
||||
after_read[i] = clock();
|
||||
|
||||
for(unsigned short iter_row = 0; iter_row < _DEF_NB_PIXEL_ROW; iter_row++)
|
||||
{
|
||||
//printf("checking row %d\n",iter_row);
|
||||
for(unsigned short iter_col = 0; iter_col < _DEF_NB_PIXEL_COL; iter_col+=2)
|
||||
{
|
||||
if(ar_u16PixelsReRead[iter_row][iter_col] != ar_u16Pixels[iter_row][iter_col])
|
||||
{/*
|
||||
printf("Error pix1 on row %d, col %d: expected %04x, got %04x\n",
|
||||
iter_row, iter_col,
|
||||
ar_u16Pixels[iter_row][iter_col],
|
||||
ar_u16PixelsReRead[iter_row][iter_col]);*/
|
||||
NbErr++;
|
||||
}
|
||||
if(ar_u16PixelsReRead[iter_row][iter_col+1] != ar_u16Pixels[iter_row][iter_col+1])
|
||||
{/*
|
||||
printf("Error pix2 on row %d, col %d: expected %04x, got %04x\n",
|
||||
iter_row, iter_col,
|
||||
ar_u16Pixels[iter_row][iter_col+1],
|
||||
ar_u16PixelsReRead[iter_row][iter_col+1]);*/
|
||||
NbErr++;
|
||||
}
|
||||
}
|
||||
}
|
||||
after_check[i] = clock();
|
||||
}
|
||||
/*
|
||||
clock_t end = clock();
|
||||
printf("time to create: %f\n",(double)(after_create-begin)/CLOCKS_PER_SEC);
|
||||
printf("time to write: %f\n",(double)(after_write-after_create)/CLOCKS_PER_SEC);
|
||||
for(unsigned int i = 0; i<NB_CHECK_LOOP; i++)
|
||||
{
|
||||
printf("time to draw [%d]: %f\n",i,(double)(after_draw[i]-before_draw[i])/CLOCKS_PER_SEC);
|
||||
printf("time to read [%d]: %f\n",i,(double)(after_read[i]-after_draw[i])/CLOCKS_PER_SEC);
|
||||
printf("time to check [%d]: %f\n",i,(double)(after_check[i]-after_read[i])/CLOCKS_PER_SEC);
|
||||
}
|
||||
printf("overall: %f\n",(double)(end-begin)/CLOCKS_PER_SEC);
|
||||
* */
|
||||
//sleep(10);
|
||||
return NbErr;
|
||||
}
|
||||
|
||||
unsigned long long
|
||||
test_TMU_datalines_Huge( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const unsigned char ucNumTMU,
|
||||
const unsigned char RamSizeMB)
|
||||
{
|
||||
typedef struct _def_sMemBlock{
|
||||
unsigned long ulAddStart;
|
||||
unsigned long ulAddEnd;
|
||||
unsigned long ulAddLength;
|
||||
}def_sMemBlock;
|
||||
|
||||
const def_sMemBlock ar_memBlocks[] = {
|
||||
{ .ulAddStart = 0x000000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
{ .ulAddStart = 0x100000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
{ .ulAddStart = 0x200000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
{ .ulAddStart = 0x300000,
|
||||
.ulAddLength = 0x100000
|
||||
},
|
||||
};
|
||||
|
||||
unsigned long long ullNbErrorAll = 0;
|
||||
|
||||
/* set the Init0 register to enable ? MBytes of memory */
|
||||
// info->tmuInit0[tmu] = SST_TREXINIT0_DEFAULT | BIT(20); // BIT(20) seems to use bank 2...even if TMU mem is <= 2MB
|
||||
|
||||
devInfo->tmuInit0[(int)ucNumTMU] = SST_TREXINIT0_DEFAULT ;
|
||||
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sstregs,ucNumTMU)->trexInit0, devInfo->tmuInit0[(int)ucNumTMU]);
|
||||
sst1InitIdle(sst);
|
||||
/*
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sstregs,ucNumTMU)->trexInit0, 0x5000 | (devInfo->tmuInit0[(int)ucNumTMU] & ~0x7000));
|
||||
sst1InitIdle(sst);
|
||||
*/
|
||||
|
||||
// set downstream TMUs to passthrough
|
||||
for (int i=0; i<ucNumTMU; i++)
|
||||
ISET(SST_TREX(sstregs,i)->textureMode, SST_TC_PASS | SST_TCA_PASS);
|
||||
|
||||
for( int iMemBlock = 0;
|
||||
iMemBlock <= sizeof(ar_memBlocks)/sizeof(def_sMemBlock);
|
||||
iMemBlock++)
|
||||
{
|
||||
const def_sMemBlock* pMemBlk = &ar_memBlocks[iMemBlock];
|
||||
if(RamSizeMB<4 && pMemBlk->ulAddStart >= 0x300000) continue;
|
||||
if(RamSizeMB<3 && pMemBlk->ulAddStart >= 0x200000) continue;
|
||||
if(RamSizeMB<2 && pMemBlk->ulAddStart >= 0x100000) continue;
|
||||
//printf("RamSizeMB= %d, ulAddStart=%08x\n", RamSizeMB,pMemBlk->ulAddStart);
|
||||
|
||||
for( FxU32 addrTest = pMemBlk->ulAddStart ;
|
||||
addrTest < (pMemBlk->ulAddStart + pMemBlk->ulAddLength);
|
||||
addrTest += 65536) //256x256x2 (16bit pixels texture)
|
||||
{
|
||||
//printf("Testing memory block 0x%08x ...\n", addrTest);
|
||||
ullNbErrorAll += RenderTest( devInfo,
|
||||
sst,
|
||||
sstregs,
|
||||
ucNumTMU,
|
||||
addrTest);
|
||||
}
|
||||
}
|
||||
|
||||
/* reset the Init0 register back to its previous value */
|
||||
sst1InitIdle(sst);
|
||||
ISET(SST_TREX(sst,ucNumTMU)->trexInit0, devInfo->tmuInit0[(int)ucNumTMU]);
|
||||
sst1InitIdle(sst);
|
||||
|
||||
return ullNbErrorAll;
|
||||
}
|
||||
11
Test_Data_Huge.h
Normal file
11
Test_Data_Huge.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef _DEF_TEST_DATA_HUGE_H_
|
||||
#define _DEF_TEST_DATA_HUGE_H_
|
||||
|
||||
unsigned long long
|
||||
test_TMU_datalines_Huge( sst1DeviceInfoStruct* devInfo,
|
||||
FxU32* sst,
|
||||
SstRegs *sstregs,
|
||||
const unsigned char ucNumTMU,
|
||||
const unsigned char RamSizeMB);
|
||||
|
||||
#endif //_DEF_TEST_DATA_HUGE_H_
|
||||
102
Utils.c
Normal file
102
Utils.c
Normal file
@@ -0,0 +1,102 @@
|
||||
#define _BSD_SOURCE 1
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include "Utils.h"
|
||||
|
||||
inline void
|
||||
printbin32( const unsigned long ulVal,
|
||||
const unsigned char bGroupByBytes)
|
||||
{
|
||||
for(unsigned long idxBit = 1<<31;idxBit>0;idxBit>>=1)
|
||||
{
|
||||
if(bGroupByBytes)
|
||||
switch(idxBit)
|
||||
{
|
||||
case 1<<23:
|
||||
case 1<<15:
|
||||
case 1<<7:
|
||||
putchar(' ');
|
||||
}
|
||||
putchar(ulVal & idxBit ? '1' : '0');
|
||||
}
|
||||
}
|
||||
|
||||
inline unsigned char
|
||||
count_bit32(const unsigned long ulVal)
|
||||
{
|
||||
unsigned char cpt = 0;
|
||||
for(unsigned long idxBit = 1<<31;idxBit>0;idxBit>>=1)
|
||||
if(ulVal & idxBit)
|
||||
cpt++;
|
||||
return cpt;
|
||||
}
|
||||
|
||||
inline unsigned char
|
||||
count_bit8(const unsigned char ulVal)
|
||||
{
|
||||
unsigned char cpt = 0;
|
||||
for(unsigned char idxBit = 1<<7;idxBit>0;idxBit>>=1)
|
||||
if(ulVal & idxBit)
|
||||
cpt++;
|
||||
return cpt;
|
||||
}
|
||||
|
||||
inline void
|
||||
printbin32Info( const unsigned long ulVal,
|
||||
const unsigned short uhb,
|
||||
const unsigned short ulb)
|
||||
{
|
||||
printbin32(ulVal,1);
|
||||
putchar('\n');
|
||||
printf("%02d....%02d %02d....%02d %02d....%02d %02d....%02d\n",
|
||||
uhb,
|
||||
3*(uhb+ulb+1)/4, 3*((uhb+ulb+1)/4)-1,
|
||||
(uhb+ulb+1)/2, ((uhb+ulb+1)/2)-1,
|
||||
(uhb+ulb+1)/4, ((uhb+ulb+1)/4)-1,
|
||||
ulb);
|
||||
}
|
||||
|
||||
unsigned long get_notnull_random()
|
||||
{
|
||||
unsigned long val;
|
||||
do
|
||||
val = random()<<1 ^ random();
|
||||
while(!val);
|
||||
return val;
|
||||
}
|
||||
|
||||
unsigned long get_notnull_random_balanced()
|
||||
{
|
||||
unsigned long val;
|
||||
do
|
||||
val = random()<<1 ^ random();
|
||||
while(count_bit32(val) != 16);
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
unsigned char get_notnull8_random_balanced()
|
||||
{
|
||||
unsigned char val;
|
||||
static unsigned char prev = 0;
|
||||
do
|
||||
val = random()<<1 ^ random();
|
||||
while((count_bit8(val) != 4) || (val == prev));
|
||||
prev = val;
|
||||
return val;
|
||||
}
|
||||
|
||||
unsigned long get_notnull_random_balanced_mByte()
|
||||
{
|
||||
unsigned long val;
|
||||
static unsigned long prev = 0;
|
||||
do
|
||||
val = (get_notnull8_random_balanced() << 24)
|
||||
| (get_notnull8_random_balanced() << 16)
|
||||
| (get_notnull8_random_balanced() << 8)
|
||||
| (get_notnull8_random_balanced() << 0);
|
||||
while(val == prev);
|
||||
prev = val;
|
||||
return val;
|
||||
}
|
||||
13
Utils.h
Normal file
13
Utils.h
Normal file
@@ -0,0 +1,13 @@
|
||||
#ifndef _DEF_UTILS_H_
|
||||
#define _DEF_UTILS_H_
|
||||
|
||||
inline void printbin32(const unsigned long ulVal,const unsigned char bGroupByBytes);
|
||||
inline unsigned char count_bit32(const unsigned long ulVal);
|
||||
inline unsigned char count_bit8(const unsigned char ulVal);
|
||||
inline void printbin32Info(const unsigned long ulVal, const unsigned short uhb, const unsigned short ulb);
|
||||
unsigned long get_notnull_random();
|
||||
unsigned long get_notnull_random_balanced();
|
||||
unsigned char get_notnull8_random_balanced();
|
||||
unsigned long get_notnull_random_balanced_mByte();
|
||||
|
||||
#endif //_DEF_UTILS_H_
|
||||
157
main.c
Normal file
157
main.c
Normal file
@@ -0,0 +1,157 @@
|
||||
#define _BSD_SOURCE 1
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <time.h>
|
||||
|
||||
#include <cvg.h>
|
||||
#include <fxpci.h>
|
||||
#include <sst1init.h>
|
||||
#include <3dfx.h>
|
||||
#include <glide.h>
|
||||
|
||||
#include "FaultSources.h"
|
||||
#include "Utils.h"
|
||||
#include "Draw.h"
|
||||
|
||||
#include "Test_Address.h"
|
||||
#include "Test_Data.h"
|
||||
#include "Test_Data_Huge.h"
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
unsigned long long ullNbErrorAll = 0;
|
||||
const FxU32 boardNum = 0;
|
||||
//const int TMU_to_test = 0;
|
||||
//const unsigned char bRandom = 1;
|
||||
|
||||
sst1DeviceInfoStruct devInfo;
|
||||
FxU32* sst;
|
||||
SstRegs *sstregs;
|
||||
|
||||
printf("3Dfx Voodoo2 TMU memory tester v1.0\n(c) ChaCha, 2026\n\n");
|
||||
|
||||
srandom(time(NULL));
|
||||
FaultSource_Reset();
|
||||
|
||||
for(int j=0; j<100; j++)
|
||||
{
|
||||
|
||||
if ((sst = sst1InitMapBoard(boardNum)) == NULL)
|
||||
{
|
||||
fprintf(stderr, "No Voodoo boards found\n");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
sst1InitRegisters(sst);
|
||||
|
||||
if (sst1InitGetDeviceInfo(sst, &devInfo) == FXFALSE)
|
||||
{
|
||||
fprintf(stderr, "Couldn't get info for Voodoo # %d\n", boardNum);
|
||||
exit(-1);
|
||||
}
|
||||
/*
|
||||
grGlideInit();
|
||||
GrHwConfiguration hwconfig;
|
||||
if(!grSstQueryHardware(&hwconfig))
|
||||
{
|
||||
fprintf(stderr, "Couldn't get glide info for Voodoo # %d\n", boardNum);
|
||||
exit(-1);
|
||||
}
|
||||
grSstSelect(boardNum);
|
||||
*/
|
||||
sstregs = (SstRegs *) sst;
|
||||
|
||||
printf("FBI Memory: %d MB\n", devInfo.fbiMemSize);
|
||||
for (int tmu = 0; tmu < devInfo.numberTmus; tmu++)
|
||||
{
|
||||
printf("TMU %d RAM: %d MB\n", tmu, devInfo.tmuMemSize[tmu]);
|
||||
}
|
||||
putchar('\n');
|
||||
|
||||
ISET(sstregs->lfbMode, SST_LFB_RGBALANES_ARGB | SST_LFB_READFRONTBUFFER);
|
||||
ISET(sstregs->fbzMode, SST_DRAWBUFFER_FRONT | SST_RGBWRMASK);
|
||||
ISET(sstregs->fbzColorPath, SST_RGBSEL_TREXOUT | SST_CC_PASS | SST_ENTEXTUREMAP);
|
||||
ISET(sstregs->textureMode, SST_RGB565 | SST_TC_REPLACE | SST_TCA_REPLACE);
|
||||
ISET(sstregs->tLOD, 0);
|
||||
|
||||
//if(devInfo.tmuMemSize[1]==1) continue;
|
||||
//devInfo.numberTmus=1;
|
||||
//devInfo.tmuMemSize[1]==1;
|
||||
for (int tmu = 0; tmu < devInfo.numberTmus; tmu++)
|
||||
{
|
||||
printf("Testing Board %d, TMU %d, %dMB \n\n",boardNum,tmu,devInfo.tmuMemSize[tmu]);
|
||||
|
||||
puts("# address & control lines test - cumulated");
|
||||
for(int j=0;j<100;j++)
|
||||
{
|
||||
const unsigned long long err
|
||||
= RenderTestAddress(&devInfo,
|
||||
sst,
|
||||
sstregs,
|
||||
tmu,
|
||||
devInfo.tmuMemSize[tmu]);
|
||||
ullNbErrorAll += err;
|
||||
putchar( err ? 'E' : '-');
|
||||
fflush(stdout);
|
||||
}
|
||||
putchar('\n');
|
||||
|
||||
puts("# data test - single bit move");
|
||||
for(int j=0;j<100;j++)
|
||||
{
|
||||
const unsigned long long err
|
||||
= test_TMU_datalines(&devInfo,
|
||||
sst,
|
||||
sstregs,
|
||||
tmu ,
|
||||
0, //bit shift
|
||||
devInfo.tmuMemSize[tmu]);
|
||||
ullNbErrorAll += err;
|
||||
putchar( err ? 'E' : '-');
|
||||
fflush(stdout);
|
||||
}
|
||||
putchar('\n');
|
||||
|
||||
puts("# data test - random pattern");
|
||||
for(int j=0;j<100;j++)
|
||||
{
|
||||
const unsigned long long err
|
||||
= test_TMU_datalines(&devInfo,
|
||||
sst,
|
||||
sstregs,
|
||||
tmu ,
|
||||
1, // random
|
||||
devInfo.tmuMemSize[tmu]);
|
||||
ullNbErrorAll += err;
|
||||
putchar( err ? 'E' : '-');
|
||||
fflush(stdout);
|
||||
}
|
||||
putchar('\n');
|
||||
|
||||
puts("# data test - huge data");
|
||||
for(int j=0;j<10;j++)
|
||||
{
|
||||
const unsigned long long err
|
||||
= test_TMU_datalines_Huge( &devInfo,
|
||||
sst,
|
||||
sstregs,
|
||||
tmu ,
|
||||
devInfo.tmuMemSize[tmu]);
|
||||
ullNbErrorAll += err;
|
||||
putchar( err ? 'E' : '-');
|
||||
fflush(stdout);
|
||||
}
|
||||
putchar('\n');
|
||||
}
|
||||
}
|
||||
|
||||
FaultSource_Sort();
|
||||
FaultSource_Display();
|
||||
|
||||
printf("Test Complete, ullNbErrorAll = %lld\n",ullNbErrorAll);
|
||||
//grGlideShutdown();
|
||||
pciClose();
|
||||
return 0;
|
||||
}
|
||||
Reference in New Issue
Block a user