Previous checkin of asm files were already preprocessed.
Fixed build rules for 3DNow optimized assembly.
This commit is contained in:
joseph
@@ -1,151 +1,150 @@
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# 1 "cpudtect.S"
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/*
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** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONL
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** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGH
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** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DF
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** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
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** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
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** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
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** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR
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** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
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**
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** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT T
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** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS I
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** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013
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** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FA
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** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS O
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** THE UNITED STATES.
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**
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** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVE
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*
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/* $Header$ *
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/* $Log$
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/* Revision 1.1 2000/06/15 00:27:42 josep
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/* Initial checkin into SourceForge
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/
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/* Revision 1.1.1.1 2000/04/26 20:35:32 poppa
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/* Initial Napalm Glide from Precision Insight
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/* */
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/* */
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/* 9 3/10/99 10:40a Peter */
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/* detect katmai-ness */
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/* */
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/* 8 1/20/99 5:50p Peter */
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/* norbert's code for k6 and k7 (?) wc */
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/* */
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/* 7 12/09/98 1:11p Peter */
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/* cpu detection from Norbert for teh rest of the 3DNow!(tm) partners */
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/* */
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/* 6 10/03/98 3:35p Peter */
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/* First pass at dynamic detection of 3DNow!(tm) */
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/* */
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/* 5 7/24/98 1:40p Hohn */
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/* */
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/* 4 5/28/97 8:23a Peter */
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/* Merge w/ original glide source */
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/* */
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/* 2 3/04/97 9:10p Dow */
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.file "cpudtect.asm"
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/* Data for data segment goes here */
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/* _DATA SEGMENT DWORD USE32 PUBLIC 'DATA' */
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/* _DATA ENDS */
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/* Some useful constants */
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/* CPU Type */
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#define CPUTypeUnknown $0x0ffffffff
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#define CPUTypePrePent $0x4
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#define CPUTypeP5 $0x5
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#define CPUTypeP6 $0x6
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/* References to external data: */
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.text
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/* _cpu_detect_asm - detect the type of CPU */
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/* */
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/* USAGE: */
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/* int __cdecl _cpu_detect_asm(void) */
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/* returns 4 for non-pen */
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.globl _cpu_detect_asm
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.type _cpu_detect_asm,@function
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_cpu_detect_asm:
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.L_cpu_detect_asm_P6Stuff:
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push %esi
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push %esi /* save registers that are not volatile */
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push %edi
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push %ebx
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push %ebp
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pushf
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pop %eax
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mov %eax , %ecx
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xor $0x0200000 , %eax
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push %eax
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popf
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pushf
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pop %eax
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xor %ecx , %eax
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jz .L_cpu_detect_asm_NotPentium
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/* First, determine whether CPUID instruction is available. */
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/* If it's not, then it's a 386 or 486. */
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pushf /* push original EFLAGS. */
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pop %eax /* pop into eax */
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mov %eax , %ecx /* save original EFLAGS in ecx */
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xor $0x0200000 , %eax /* flip ID bit in EFLAGS */
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push %eax /* put it back on stack */
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popf /* pop into EFLAGS */
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pushf /* get EFLAGS back */
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pop %eax /* into eax */
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xor %ecx , %eax /* check to see if we could toggle ID */
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jz .L_cpu_detect_asm_NotPentium /* Sorry, not P5 or P6. */
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/* Now determine whether it's an intel P6 CPU. */
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xor %eax , %eax
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cpuid
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xor $0x0756e6547 , %ebx
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/* Is it an Intel CPU? */
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xor %eax , %eax /* eax = 0. */
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cpuid /* get cpuid */
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xor $0x0756e6547 , %ebx /* "Genu" */
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jnz .L_cpu_detect_asm_NotIntel
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xor $0x049656e69 , %edx
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xor $0x049656e69 , %edx /* "ineI" */
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jnz .L_cpu_detect_asm_NotIntel
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xor $0x06c65746e , %ecx
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xor $0x06c65746e , %ecx /* "ntel" */
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jnz .L_cpu_detect_asm_NotIntel
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/* Verifying architecture family */
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/* eax - type[13:12] family[11:8] model[7:4] revision[3:0] */
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/* edx - feature bits */
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mov $1 , %eax
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cpuid
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cpuid /* get family/model/stepping */
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shr $8 , %eax
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and $0x0f , %eax
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shr $8 , %eax /* rid of model & stepping number */
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and $0x0f , %eax /* use only family */
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cmp $6 , %eax
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jl .L_cpu_detect_asm_IsP5
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jl .L_cpu_detect_asm_IsP5 /* It's a P5 */
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/* Else it's a P6 */
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/* Intel P6 processor. */
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/* feature bits are in edx from the cpuid[1] */
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.L_cpu_detect_asm_IsP6:
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/* Make sure it supports Memory Type Range Request registers (bit 12) */
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mov %edx , %ebx
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test $0x1000 , %ebx
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/* Hmmmm... p6 w/o mtrr's? */
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jz .L_cpu_detect_asm_IsP5
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/* Check for katmai-ness (bit 25) */
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test $0x2000000 , %edx
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jz .L_cpu_detect_asm_noKNI
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mov $7 , %eax
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jmp .L_cpu_detect_asm_DoneCpu
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jmp .L_cpu_detect_asm_DoneCpu /* return */
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.L_cpu_detect_asm_noKNI:
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mov $6 , %eax
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jmp .L_cpu_detect_asm_DoneCpu
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mov $6 , %eax /* */
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jmp .L_cpu_detect_asm_DoneCpu /* return */
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.L_cpu_detect_asm_IsP5:
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mov $5 , %eax
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mov $5 , %eax /* */
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jmp .L_cpu_detect_asm_DoneCpu
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.L_cpu_detect_asm_NotPentium:
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@@ -161,35 +160,35 @@ _cpu_detect_asm:
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.L_cpu_detect_asm_NotIntel:
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/* This is a non-Intel processor. Figure out whether it supports */
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/* both MMX and 3DNow!, in which case we can use Norbert's cool */
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/* MMX/3DNow!(tm) code */
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/* The return value is split into two 16-bit fields. Bits [31:16] */
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/* identify the processor vendor as follows: */
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/* 8001h AMD */
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/* 8002h Cyrix */
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/* 8003h IDT */
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/* Bits [15:0] identify processor features as follows: */
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/* 0001h MMX */
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/* 0002h 3DNow! (tm) */
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/* 0004h K6-style MTRRs */
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/* 0008h PentiumII-style MTRRs */
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xor %esi , %esi
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xor %edi , %edi
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xor %esi , %esi /* default feature flags */
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xor %edi , %edi /* default extended feature flags */
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/* Test whether extended feature function is supported */
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mov $0x80000000 , %eax
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cpuid
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cmp $0x80000000 , %eax
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jbe .L_cpu_detect_asm_NoExtendedFeatures
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/* execute extended feature function */
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mov $0x80000001 , %eax
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cpuid
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@@ -197,81 +196,81 @@ _cpu_detect_asm:
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.L_cpu_detect_asm_NoExtendedFeatures:
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/* execute standard feature function */
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mov $1 , %eax
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cpuid
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mov %edx , %esi
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mov %eax , %ebp
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mov %eax , %ebp /* save family/model/stepping */
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/* get the vendor string */
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mov $0 , %eax
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cpuid
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.L_cpu_detect_asm_ChkAMD:
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cmp $0x68747541 , %ebx
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cmp $0x68747541 , %ebx /* 'htuA' */
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jne .L_cpu_detect_asm_ChkCyrix
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cmp $0x69746E65 , %edx
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cmp $0x69746E65 , %edx /* 'itne' */
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jne .L_cpu_detect_asm_ChkCyrix
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cmp $0x444D4163 , %ecx
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cmp $0x444D4163 , %ecx /* 'DMAc' */
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je .L_cpu_detect_asm_CPUisAMD
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.L_cpu_detect_asm_ChkCyrix:
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cmp $0x69727943 , %ebx
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cmp $0x69727943 , %ebx /* 'iryC' */
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jne .L_cpu_detect_asm_ChkIDT
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cmp $0x736E4978 , %edx
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cmp $0x736E4978 , %edx /* 'snIx' */
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jne .L_cpu_detect_asm_ChkIDT
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cmp $0x64616574 , %ecx
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cmp $0x64616574 , %ecx /* 'deat' */
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je .L_cpu_detect_asm_CPUisCyrix
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.L_cpu_detect_asm_ChkIDT:
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cmp $0x746E6543 , %ebx
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cmp $0x746E6543 , %ebx /* 'tneC' */
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jne .L_cpu_detect_asm_UnknownVendor
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cmp $0x48727561 , %edx
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cmp $0x48727561 , %edx /* 'Hrua' */
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jne .L_cpu_detect_asm_UnknownVendor
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cmp $0x736C7561 , %ecx
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cmp $0x736C7561 , %ecx /* 'slua' */
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jne .L_cpu_detect_asm_UnknownVendor
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.L_cpu_detect_asm_CPUisIDT:
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mov $0x80030000 , %eax
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test $0x00800000 , %esi
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mov $0x80030000 , %eax /* vendor = IDT, features = none */
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test $0x00800000 , %esi /* check for MMX bit in features */
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jz .L_cpu_detect_asm_DoneCpu
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or $1 , %eax
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test $0x80000000 , %edi
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or $1 , %eax /* set MMX feature flag */
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test $0x80000000 , %edi /* check for 3DNow! bit in extended features */
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jz .L_cpu_detect_asm_DoneCpu
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or $2 , %eax
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or $2 , %eax /* set 3DNow! feature flag */
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jmp .L_cpu_detect_asm_DoneCpu
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.L_cpu_detect_asm_CPUisAMD:
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mov $0x80010000 , %eax
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mov %ebp , %edx
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and $0x00000FFF , %edx
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cmp $0x00000588 , %edx
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jb .L_cpu_detect_asm_AmdMTRRchkDone
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cmp $0x00000600 , %edx
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jb .L_cpu_detect_asm_AmdHasK6MTRR
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or $8 , %eax
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mov $0x80010000 , %eax /* vendor = AMD, features = none */
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mov %ebp , %edx /* family/model/stepping information */
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and $0x00000FFF , %edx /* extract family/model/stepping */
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cmp $0x00000588 , %edx /* CXT, Sharptooth, or K7 ? */
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jb .L_cpu_detect_asm_AmdMTRRchkDone /* nope, definitely no MTRRs */
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cmp $0x00000600 , %edx /* K7 or better ? */
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jb .L_cpu_detect_asm_AmdHasK6MTRR /* nope, but supports K6 MTRRs */
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or $8 , %eax /* set P2_MTRR feature flag */
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jmp .L_cpu_detect_asm_AmdMTRRchkDone
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.L_cpu_detect_asm_AmdHasK6MTRR:
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or $4 , %eax
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or $4 , %eax /* set K6_MTRR feature flag */
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.L_cpu_detect_asm_AmdMTRRchkDone:
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test $0x00800000 , %esi
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test $0x00800000 , %esi /* check for MMX bit in features */
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jz .L_cpu_detect_asm_DoneCpu
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or $1 , %eax
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test $0x80000000 , %edi
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or $1 , %eax /* set MMX feature flag */
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test $0x80000000 , %edi /* check for 3DNow! bit in extended features */
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jz .L_cpu_detect_asm_DoneCpu
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or $2 , %eax
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or $2 , %eax /* set 3DNow! feature flag */
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jmp .L_cpu_detect_asm_DoneCpu
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.L_cpu_detect_asm_CPUisCyrix:
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mov $0x80020000 , %eax
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test $0x00800000 , %esi
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mov $0x80020000 , %eax /* vendor = Cyrix, features = none */
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test $0x00800000 , %esi /* check for MMX bit in features */
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jz .L_cpu_detect_asm_DoneCpu
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or $1 , %eax
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test $0x80000000 , %edi
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or $1 , %eax /* set MMX feature flag */
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test $0x80000000 , %edi /* check for 3DNow! bit in extended features */
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jz .L_cpu_detect_asm_DoneCpu
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or $2 , %eax
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or $2 , %eax /* set 3DNow! feature flag */
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jmp .L_cpu_detect_asm_DoneCpu
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.L_cpu_detect_asm_UnknownVendor:
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@@ -283,18 +282,18 @@ _cpu_detect_asm:
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.size _cpu_detect_asm,.L_END__cpu_detect_asm-_cpu_detect_asm
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.align 4
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/* ------------------------------------------------------------------------------ */
|
||||
/* this routine sets the precision to single */
|
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/* which effects all adds, mults, and divs */
|
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.align 4 /* */
|
||||
.globl single_precision_asm
|
||||
.type single_precision_asm,@function
|
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single_precision_asm:
|
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push %eax
|
||||
fnclex
|
||||
push %eax /* make room */
|
||||
fnclex /* clear pending exceptions */
|
||||
fstcw (%esp)
|
||||
movl (%esp) , %eax
|
||||
and $0x0000fcff , %eax
|
||||
and $0x0000fcff , %eax /* clear bits 9:8 */
|
||||
movl %eax , (%esp)
|
||||
fldcw (%esp)
|
||||
pop %eax
|
||||
@@ -302,19 +301,19 @@ single_precision_asm:
|
||||
.L_END_single_precision_asm:
|
||||
.size single_precision_asm,.L_END_single_precision_asm-single_precision_asm
|
||||
|
||||
|
||||
|
||||
|
||||
.align 4
|
||||
/* ------------------------------------------------------------------------------ */
|
||||
/* this routine sets the precision to double */
|
||||
/* which effects all adds, mults, and divs */
|
||||
.align 4 /* */
|
||||
.globl double_precision_asm
|
||||
.type double_precision_asm,@function
|
||||
double_precision_asm:
|
||||
push %eax
|
||||
fnclex
|
||||
push %eax /* make room */
|
||||
fnclex /* clear pending exceptions */
|
||||
fstcw (%esp)
|
||||
movl (%esp) , %eax
|
||||
and $0x0000fcff , %eax
|
||||
or $0x000002ff , %eax
|
||||
and $0x0000fcff , %eax /* clear bits 9:8 */
|
||||
or $0x000002ff , %eax /* set 9:8 to 10 */
|
||||
movl %eax , (%esp)
|
||||
fldcw (%esp)
|
||||
pop %eax
|
||||
|
||||
@@ -279,7 +279,7 @@ endif
|
||||
#
|
||||
PREPROCESSOR=/lib/cpp -$$
|
||||
%.o: %.s
|
||||
$(PREPROCESSOR) $< > $*.tmp.s
|
||||
$(PREPROCESSOR) $(PREPROCESSOR_FLAGS) $< > $*.tmp.s
|
||||
$(CC) $(AFLAGS) -c -o $@ $*.tmp.s
|
||||
$(RM) -f $*.tmp.s
|
||||
|
||||
@@ -290,20 +290,35 @@ cpudtect.o: cpudtect.s
|
||||
# 3DNow!(tm) dependencies
|
||||
# XXX_def.obj targets are the default targets
|
||||
|
||||
|
||||
ifneq ($(GL_AMD3D),)
|
||||
# I have to copy the build rule from above, because the _def/_3dnow
|
||||
# causes the object file names not to match up with the source file names.
|
||||
# And I need to selectively enable the 3DNow flags.
|
||||
|
||||
xdraw2_def.o: xdraw2.s xdraw2.inc.s fxgasm.h
|
||||
$(CC) $(AFLAGS) -c -o $@ xdraw2.s
|
||||
$(PREPROCESSOR) $< > $*.tmp.s
|
||||
$(CC) $(AFLAGS) -c -o $@ $*.tmp.s
|
||||
$(RM) -f $*.tmp.s
|
||||
|
||||
xdraw2_3dnow.o: xdraw2.s xdraw2.inc.s fxgasm.h
|
||||
$(CC) $(AFLAGS) -DGL_AMD3D -DUSE_PACKET_FIFO=1 -c -o $@ xdraw2.s
|
||||
$(PREPROCESSOR) -DGL_AMD3D -DUSE_PACKET_FIFO=1 $< > $*.tmp.s
|
||||
$(CC) $(AFLAGS) -c -o $@ $*.tmp.s
|
||||
$(RM) -f $*.tmp.s
|
||||
|
||||
xdraw3_def.o: xdraw3.s fxgasm.h
|
||||
$(CC) $(AFLAGS) -c -o $@ xdraw3.s
|
||||
$(PREPROCESSOR) $< > $*.tmp.s
|
||||
$(CC) $(AFLAGS) -c -o $@ $*.tmp.s
|
||||
$(RM) -f $*.tmp.s
|
||||
|
||||
xdraw3_3dnow.o: xdraw3.s fxgasm.h
|
||||
$(CC) $(AFLAGS) -DGL_AMD3D -DUSE_PACKET_FIFO=1 -c -o $@ xdraw3.s
|
||||
$(PREPROCESSOR) -DGL_AMD3D -DUSE_PACKET_FIFO=1 $< > $*.tmp.s
|
||||
$(CC) $(AFLAGS) -c -o $@ $*.tmp.s
|
||||
$(RM) -f $*.tmp.s
|
||||
|
||||
xtexdl_3dnow.o: xtexdl.s fxgasm.h
|
||||
$(CC) $(AFLAGS) -DGL_AMD3D -DUSE_PACKET_FIFO=1 -c -o $@ xtexdl.s
|
||||
$(PREPROCESSOR) -DGL_AMD3D -DUSE_PACKET_FIFO=1 $< > $*.tmp.s
|
||||
$(CC) $(AFLAGS) -c -o $@ $*.tmp.s
|
||||
$(RM) -f $*.tmp.s
|
||||
|
||||
endif # GL_AMD3D
|
||||
|
||||
@@ -1,46 +1,46 @@
|
||||
/*
|
||||
/*
|
||||
** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
|
||||
** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
|
||||
** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
|
||||
** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
|
||||
** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
|
||||
** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
|
||||
** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
|
||||
** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
|
||||
**
|
||||
** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
|
||||
** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
|
||||
** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
|
||||
** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR
|
||||
** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
|
||||
**
|
||||
** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
|
||||
** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
|
||||
** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
|
||||
** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
|
||||
** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
|
||||
** THE UNITED STATES.
|
||||
**
|
||||
**
|
||||
** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
|
||||
*/
|
||||
*/
|
||||
|
||||
/* -*-asm-*- */
|
||||
|
||||
/* $Header$ */
|
||||
/* $Revision$ */
|
||||
/* $Log$ */
|
||||
/* Revision 1.1 2000/06/15 00:27:43 joseph */
|
||||
/* Initial checkin into SourceForge. */
|
||||
/* $Header$ *
|
||||
/* $Revision$ *
|
||||
/* $Log$
|
||||
/* Revision 1.1 2000/06/15 00:27:43 joseph
|
||||
/* Initial checkin into SourceForge.
|
||||
/
|
||||
/* Revision 1.1.1.1 2000/04/26 20:35:32 poppa */
|
||||
/* Initial Napalm Glide from Precision Insight */
|
||||
/* */
|
||||
/* Revision 1.2 2000/04/18 15:58:15 poppa */
|
||||
/* h5/glide3/src/glide.h: Define grSwapBuffers as grDRISwapBuffers. This */
|
||||
/* may not be right. */
|
||||
/* h5/glide3/src/makefile.linux: */
|
||||
/* Added definition of AFLAGS. */
|
||||
/* h5/glide3/src/xdraw2.S:Fixed some macros to make the assembler work on */
|
||||
/* this file. */
|
||||
/* h5/glide3/src/xdraw2.inc.S: */
|
||||
/* Fixed some macros to make the assembler work on */
|
||||
/* this file. */
|
||||
/* h5/minihwc/gdebug.c: Apparently fclose(NULL) fails in Linux. This */
|
||||
/* is the POSIX behavior as I recall. */
|
||||
/* Revision 1.1.1.1 2000/04/26 20:35:32 poppa
|
||||
/* Initial Napalm Glide from Precision Insight
|
||||
/*
|
||||
/* Revision 1.2 2000/04/18 15:58:15 poppa
|
||||
/* h5/glide3/src/glide.h: Define grSwapBuffers as grDRISwapBuffers. This
|
||||
/* may not be right.
|
||||
/* h5/glide3/src/makefile.linux:
|
||||
/* Added definition of AFLAGS.
|
||||
/* h5/glide3/src/xdraw2.S:Fixed some macros to make the assembler work on
|
||||
/* this file.
|
||||
/* h5/glide3/src/xdraw2.inc.S:
|
||||
/* Fixed some macros to make the assembler work on
|
||||
/* this file.
|
||||
/* h5/minihwc/gdebug.c: Apparently fclose(NULL) fails in Linux. This
|
||||
/* is the POSIX behavior as I recall.
|
||||
/* */
|
||||
/* */
|
||||
/* 2 10/30/97 6:53p Peter */
|
||||
@@ -245,7 +245,7 @@ LOCAL(no_validation):
|
||||
cmp tempVal , %ebx /* fifo space required >= space available ? */
|
||||
jge LOCAL(__triBegin) /* yup, push out triangle data to Voodoo */
|
||||
|
||||
pushl $__LINE__ /* line number inside this function */
|
||||
push $__LINE__ /* line number inside this function */
|
||||
push $0x0 /* pointer to function name = NULL */
|
||||
|
||||
push tempVal /* fifo space required */
|
||||
@@ -833,7 +833,7 @@ LOCAL(nocull):
|
||||
|
||||
jge LOCAL(__triBegin)
|
||||
|
||||
pushl $__LINE__
|
||||
push $__LINE__
|
||||
push $0x0
|
||||
|
||||
push %eax
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,20 +1,20 @@
|
||||
/*
|
||||
/*
|
||||
** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
|
||||
** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
|
||||
** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
|
||||
** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
|
||||
** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
|
||||
** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
|
||||
** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
|
||||
** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
|
||||
** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
|
||||
** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
|
||||
** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
|
||||
**
|
||||
** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
|
||||
**
|
||||
** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
|
||||
** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
|
||||
** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
|
||||
** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
|
||||
** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
|
||||
** THE UNITED STATES.
|
||||
**
|
||||
** THE UNITED STATES.
|
||||
**
|
||||
** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
|
||||
*/
|
||||
|
||||
|
||||
Reference in New Issue
Block a user