Voodoo5 6000 happiness
This commit is contained in:
dborca
@@ -591,6 +591,12 @@ void hwcSetSLIAAMode(hwcBoardInfo *bInfo,
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/* Enable AA and/or SLI */
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if(sliEnable || aaEnable) {
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/* v56k has an external clock! */
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if (bInfo->pciInfo.realNumChips == 4) {
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extern unsigned long gpio_6k_clock(hwcBoardInfo *bInfo);
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gpio_6k_clock(bInfo);
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}
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/* First, init all chips */
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for(chipNum = 1; chipNum < numChips; chipNum++) {
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451
glide3x/h5/minihwc/gpio.c
Normal file
451
glide3x/h5/minihwc/gpio.c
Normal file
@@ -0,0 +1,451 @@
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#include <unistd.h> /*usleep*/
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#include "minihwc.h"
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#include "h3cinitdd.h"
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#define USEC (1000)
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#define DTIME (5*USEC)
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#define MSEC (1000000)
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#define D60HZ (166*MSEC)
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#define DELAY(x) usleep(x)
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#define CLOCK_STRETCH (1000)
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#define NUM_RETRY (5)
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#define BUILD_BYTE(data, mask, position) ((unsigned char)((data & mask)<<position))
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#define ABS(A, B) ((A) < (B) ? (B) - (A) : (A) - (B))
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#define MHz(A) ((A) * 1000000)
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#define kHz(A) ((A) * 1000)
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typedef struct {
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unsigned long dwBus; /* Bus */
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unsigned long dwDevFunc;/* DevNode */
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unsigned long RN; /* Register Number */
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unsigned long dInMask; /* Data Mask */
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unsigned long dOutMask; /* Data Mask */
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unsigned long dInShift; /* Data Shift */
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unsigned long dOutShift;/* Data Shift */
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} PCI_BIT;
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typedef struct {
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PCI_BIT Data;
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PCI_BIT Clk;
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PCI_BIT Strobe;
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PCI_BIT HiVoltage;
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} GPIOMASK;
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static unsigned long pci_read_cfg (unsigned long bus,
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unsigned long dwDevFunc,
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unsigned long offset)
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{
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FxU32 data, result;
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PciRegister reg;
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reg.regAddress = offset;
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reg.sizeInBytes = 4;
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result = pciGetConfigData/*Raw*/(reg, ((dwDevFunc & 7) << 13) | (bus << 5) | (dwDevFunc & 0x1f), &data);
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/* --------function------- ----bus--- ------device------ */
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return data;
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}
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static unsigned long pci_write_cfg (unsigned long bus,
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unsigned long dwDevFunc,
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unsigned long offset,
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unsigned long value)
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{
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PciRegister reg;
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reg.regAddress = offset;
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reg.sizeInBytes = 4;
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return pciSetConfigData/*Raw*/(reg, ((dwDevFunc & 7) << 13) | (bus << 5) | (dwDevFunc & 0x1f), &value);
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/* --------function------- ----bus--- ------device------ */
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}
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/* Desc: scan for GPIO
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*
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* In : device+vendor ID, bus number to match
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* Out : 0 for failure
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*
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* Note:
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*/
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int gpio_find_device (unsigned long dwDevVenID,
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unsigned long dwBus,
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unsigned long *pdwBus,
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unsigned long *pdwDevFunc)
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{
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for (*pdwBus = 0; *pdwBus < 256; *pdwBus += 1) {
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for (*pdwDevFunc = 0; *pdwDevFunc < 0x100; *pdwDevFunc += 0x08) {
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if ((dwDevVenID == pci_read_cfg(*pdwBus, *pdwDevFunc, 0x0)) &&
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(dwBus == (pci_read_cfg(*pdwBus, *pdwDevFunc, 0x19) & 0xFF))) {
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return 1;
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}
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}
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}
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return 0;
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}
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/* Desc: init GPIO port
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*
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* In :
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* Out :
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*
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* Note: 0 for failure
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*/
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int gpio_init (GPIOMASK *pGPIOMask, unsigned long dwNapalmBus)
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{
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static int isGPIOInit = 0;
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unsigned long dwBus;
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unsigned long dwDevFunc;
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unsigned long dwData;
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if (0 == isGPIOInit) {
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if (gpio_find_device(0x00213388, dwNapalmBus, &dwBus, &dwDevFunc)) {
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isGPIOInit = 1;
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pGPIOMask->Data.dwBus = pGPIOMask->Clk.dwBus = pGPIOMask->Strobe.dwBus = dwBus;
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pGPIOMask->Data.dwDevFunc = pGPIOMask->Clk.dwDevFunc = pGPIOMask->Strobe.dwDevFunc = dwDevFunc;
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pGPIOMask->Data.RN = 0xC4;
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pGPIOMask->Data.dInMask = 0x0100;
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pGPIOMask->Data.dInShift = 0x08;
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pGPIOMask->Data.dOutMask = 0x0400;
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pGPIOMask->Data.dOutShift = 0x0A;
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pGPIOMask->Clk.RN = 0xC4;
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pGPIOMask->Clk.dInMask = 0x010000;
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pGPIOMask->Clk.dInShift = 0x10;
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pGPIOMask->Clk.dOutMask = 0x040000;
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pGPIOMask->Clk.dOutShift = 0x12;
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pGPIOMask->Strobe.RN = 0xC4;
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pGPIOMask->Strobe.dInMask = 0x1000;
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pGPIOMask->Strobe.dInShift = 0x0C;
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pGPIOMask->Strobe.dOutMask = 0x4000;
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pGPIOMask->Strobe.dOutShift = 0x0E;
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pGPIOMask->HiVoltage.RN = 0xC4;
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pGPIOMask->HiVoltage.dInMask = 0x100000;
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pGPIOMask->HiVoltage.dInShift = 0x14;
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pGPIOMask->HiVoltage.dOutMask = 0x400000;
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pGPIOMask->HiVoltage.dOutShift = 0x16;
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/* Enable all GPIO as Output */
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dwData = pci_read_cfg(dwBus, dwDevFunc, 0xC4);
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dwData &= 0xFF0000FF;
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/* C7C6C5C4 */
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dwData |= 0x00222200;
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pci_write_cfg(dwBus, dwDevFunc, 0xC4, dwData);
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}
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} else {
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dwData = pci_read_cfg(pGPIOMask->Data.dwBus, pGPIOMask->Data.dwDevFunc, 0xC4);
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dwData &= 0xFF0000FF;
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/* C7C6C5C4 */
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dwData |= 0x00222200;
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pci_write_cfg(pGPIOMask->Data.dwBus, pGPIOMask->Data.dwDevFunc, 0xC4, dwData);
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}
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return isGPIOInit;
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}
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/* Desc: read a dword
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*
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* In :
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* Out :
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*
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* Note: dword
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*/
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unsigned long gpio_get (PCI_BIT *pPCI_BIT)
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{
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return pci_read_cfg(pPCI_BIT->dwBus, pPCI_BIT->dwDevFunc, pPCI_BIT->RN);
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}
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/* Desc: read a bit
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*
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* In :
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* Out : bit
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*
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* Note:
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*/
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unsigned long gpio_get_bit (PCI_BIT *pPCI_BIT)
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{
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unsigned long bData;
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bData = pci_read_cfg(pPCI_BIT->dwBus, pPCI_BIT->dwDevFunc, pPCI_BIT->RN);
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return (bData & pPCI_BIT->dInMask) >> pPCI_BIT->dInShift;
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}
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/* Desc: write a bit
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*
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* In :
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* Out :
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*
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* Note:
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*/
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unsigned long gpio_set_bit (PCI_BIT *pPCI_BIT, unsigned long dwValue)
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{
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unsigned long dwReg;
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dwReg = gpio_get(pPCI_BIT);
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dwReg = dwReg & ~pPCI_BIT->dOutMask;
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dwReg |= ((dwValue & 0x01) << pPCI_BIT->dOutShift);
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return pci_write_cfg(pPCI_BIT->dwBus, pPCI_BIT->dwDevFunc, pPCI_BIT->RN, dwReg);
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}
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/* Desc: read the clock
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*
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* In :
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* Out :
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*
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* Note:
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*/
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int gpio_read_scl (GPIOMASK *pGPIOMask)
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{
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return gpio_get_bit(&pGPIOMask->Clk);
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}
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/* Desc: set the Clock to bit
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*
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* In :
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* Out :
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*
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* Note:
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*/
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void gpio_scl (GPIOMASK *pGPIOMask, unsigned long bit)
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{
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int nCount = 0;
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DELAY(DTIME);
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gpio_set_bit(&pGPIOMask->Clk, bit);
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DELAY(DTIME);
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if (bit) {
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while (!gpio_read_scl(pGPIOMask) && (nCount++ < CLOCK_STRETCH)) {
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DELAY(DTIME);
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}
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if (nCount++ >= CLOCK_STRETCH) {
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/*fprintf(stderr, "Slave did not respond %s %d\n", __FILE__, __LINE__);*/
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}
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}
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}
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/* Desc: set the Data to bit.
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*
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* In :
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* Out :
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*
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* Note:
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*/
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void gpio_sda (GPIOMASK *pGPIOMask, unsigned long bit)
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{
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DELAY(DTIME);
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bit = bit >> 7;
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gpio_set_bit(&pGPIOMask->Data, bit);
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DELAY(DTIME);
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}
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/* Desc: send the byte data
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*
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* In :
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* Out :
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*
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* Note:
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*/
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int gpio_send_byte (GPIOMASK *pGPIOMask,
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unsigned char b1,
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unsigned char b2,
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unsigned char b3)
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{
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int i;
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int nReturn = 0;
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for (i = 0; i < 8; i++) {
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gpio_sda(pGPIOMask, (b1 << i) & 0x80);
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gpio_scl(pGPIOMask, 1);
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if (gpio_read_scl(pGPIOMask) == 0) {
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/*fprintf(stderr, "nc\n");*/
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}
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gpio_scl(pGPIOMask, 0);
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}
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for (i = 0; i < 8; i++) {
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gpio_sda(pGPIOMask, (b2 << i) & 0x80);
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gpio_scl(pGPIOMask, 1);
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if (gpio_read_scl(pGPIOMask) == 0) {
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/*fprintf(stderr, "nc\n");*/
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}
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gpio_scl(pGPIOMask, 0);
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}
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for (i = 0; i < 8; i++) {
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gpio_sda(pGPIOMask, (b3 << i) & 0x80);
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gpio_scl(pGPIOMask, 1);
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if (gpio_read_scl(pGPIOMask) == 0) {
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/*fprintf(stderr, "nc\n");*/
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}
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gpio_scl(pGPIOMask, 0);
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}
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/* Strobe to make it happen */
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DELAY(DTIME);
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gpio_set_bit(&pGPIOMask->Strobe, 1);
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DELAY(DTIME);
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DELAY(DTIME);
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gpio_set_bit(&pGPIOMask->Strobe, 0);
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DELAY(DTIME);
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return nReturn;
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}
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/* Desc: build and send clock
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*
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* In :
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* Out :
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*
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* Note:
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*/
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unsigned long gpio_output_clock (hwcBoardInfo *bInfo,
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unsigned long c,
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unsigned long ttl,
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unsigned long f,
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unsigned long s,
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unsigned long v,
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unsigned long r)
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{
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static GPIOMASK GpioMask;
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unsigned char b1, b2, b3;
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b1 = BUILD_BYTE(c, 3, 6);
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b1 |= BUILD_BYTE(ttl, 1, 5);
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b1 |= BUILD_BYTE(f, 3, 3);
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b1 |= BUILD_BYTE(s, 7, 0);
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b2 = (unsigned char)((v & 0x1Fe) >> 1);
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b3 = BUILD_BYTE(v, 1, 7);
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b3 |= BUILD_BYTE(r, 0x7F, 0);
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if (gpio_init(&GpioMask, /*pDev->dwBus*/2/*666*/))
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gpio_send_byte(&GpioMask, b1, b2, b3);
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return 0;
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}
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/* Desc:
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*
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* In :
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* Out : 0 for failure
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*
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* Note:
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*/
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unsigned long gpio_6k_clock (hwcBoardInfo *bInfo)
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{
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static unsigned long OD[] = {2, 3, 4, 5, 6, 7, 8, 10};
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static unsigned long S2S1S0[] = {15, 15, 1, 6, 3, 4, 7, 5, 2, 15, 0};
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double d_clk1;
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double clk1;
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double d_diff;
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double d_partial;
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unsigned long rdw;
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unsigned long vdw;
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unsigned long od;
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unsigned long i;
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unsigned long b_rdw;
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unsigned long b_vdw;
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unsigned long b_od;
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unsigned long b_i;
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unsigned long bFound;
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unsigned long ic;
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unsigned long pixelclock;
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unsigned long n;
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unsigned long m;
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unsigned long k;
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unsigned long kpow;
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/* Get the Clock */
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FxU32 regBase = bInfo->regInfo.ioPortBase;
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pixelclock = IGET32(pllCtrl0);
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n = ((pixelclock & 0xFF00) >> 8)+2;
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m = ((pixelclock & 0xFC) >> 2)+2;
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k = pixelclock & 0x03;
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kpow = 1;
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for (i = 0; i < k; i++) {
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kpow <<= 1;
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}
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/* This should work to 4 GigaHertz */
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ic = 14318180 * n / m / kpow;
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ic >>= 2;
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d_diff = MHz(500.0);
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i = 0;
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bFound = 0;
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for (i = 0; i < sizeof(OD)/sizeof(unsigned long); i++) {
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od = OD[i];
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for (rdw = 1; rdw < 128; rdw++) {
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for (vdw = 4; vdw < 512; vdw++) {
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clk1 = 14318180.0*2.0*((double)vdw+8.0)/(((double)rdw+2.0)*(double)od);
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if (ABS(clk1, (double)ic) < d_diff) {
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/* Some constraints on vdw & rdw
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* 55 Mhz < 14318180 * 2* (vdw+8)/(rdw + 2) < 400 Mhz
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*/
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d_partial = 14318180.0*2.0*((double)vdw+8.0)/((double)rdw+2.0);
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if ((d_partial > MHz(55)) && (d_partial < MHz(400))) {
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/* Another constraints
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* 200 kHz < 14318180/(rdw+2)
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*/
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if (14318180/(rdw+2) > kHz(200)) {
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d_diff = ABS(clk1, (double)ic);
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bFound = 1;
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b_rdw = rdw;
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b_vdw = vdw;
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b_od = od;
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b_i = i;
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d_clk1 = clk1;
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}
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}
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}
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}
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}
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}
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if (bFound) {
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gpio_output_clock(bInfo, 0x0, 0x1, 0x0, S2S1S0[b_od], b_vdw, b_rdw);
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return ic;
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} else {
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return 0;
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}
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}
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