186 lines
5.4 KiB
C
186 lines
5.4 KiB
C
/*
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** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
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** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
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** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
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** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
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** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
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** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
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** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
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** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
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**
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** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
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** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
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** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
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** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
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** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
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** THE UNITED STATES.
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**
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** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
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**
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**
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** $Revision$
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** $Date$
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**
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** Initialization code for initializing canpus cards w/ assymetric
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** inter-chip buses.
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**
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*/
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#ifdef __WIN32__
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#pragma optimize ("",off)
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#endif
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#include <stdio.h>
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#include <stdlib.h>
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#include <math.h>
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#ifdef BUILD_FOR_SST1
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#include <sst.h>
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#else
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#include <3dfx.h>
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#include <cvgregs.h>
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#include <cvgdefs.h>
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#endif
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#define FX_DLL_DEFINITION
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#include <fxdll.h>
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#include <sst1vid.h>
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#include <sst1init.h>
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#include "canopus.h"
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/*
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* Syntax: LarsF (8/2/97)
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* sst1InitComputeClkParamsATT_Int(Frequ, *clkTiming);
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*
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*----------------------------------------------------------------------------
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* Description:
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* Calculates the PLL Parameter for the given Frequency in Hz
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*
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* Input : Frequ - Frequency in Hz
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* *clkTiming - pointer to timing structure
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* Output: *clkTiming - pointer to timing structure which would be filled
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* Return: 1 - Sucess, 0 - Error
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*/
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FxBool
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sst1InitComputeClkParamsATT_Int(FFLOAT dwFreq, sst1ClkTimingStruct *clkTiming)
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{
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#define MMAX (126+2) /* physical limit of the M parameter */
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#define NMID 18 /* PLL: middle N test range */
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#define NDELTA 15 /* PLL: +/- N test range */
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#define FI (14318180l) /* PLL: PLL frequenz in HZ */
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FxU32 lPDiv, lRatio;
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FxU16 sN, sM, sP;
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FxU16 sNBest, sMBest;
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FxU32 lError, lActual;
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FxU32 lBestErr, lBestFreq;
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// first check range of Frequ
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if ((dwFreq < 15000000) || (dwFreq > 240000000)) return FXFALSE;
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// get the best P divider for the given Frequency
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if (dwFreq < 30000000) {
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sP = 3; /* divide by 16 */
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lPDiv = 8;
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} else if ( dwFreq < 60000000 ) {
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sP = 2; /* divide by 8 */
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lPDiv = 4;
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} else if ( dwFreq < 120000000 ) {
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sP = 1; /* divide by 4 */
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lPDiv = 2;
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} else {
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sP = 0; /* divide by 1 */
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lPDiv = 1;
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}
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// next find the best N/M combination
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lBestErr = 99999999;
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sNBest = 0;
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sMBest = 0;
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lRatio = (unsigned long)((dwFreq*10l)/(FI/100l)) * lPDiv; // lRatio in [1/1000]
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for ( sN= (NMID-NDELTA); sN <= (NMID+NDELTA); sN++ ) {
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sM = (unsigned short)((lRatio * sN + 500) / 1000l);
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if (sM > MMAX) sM = MMAX;
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lActual = (unsigned long)((FI * sM) / (sN * lPDiv));
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lError = (lActual > dwFreq) ? (lActual - dwFreq) : (dwFreq - lActual);
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if ( lError < lBestErr ) {
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sNBest = sN;
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sMBest = sM;
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lBestErr = lError;
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lBestFreq = lActual;
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} /* if best */
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/* increment M also */
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sM++;
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if (sM > MMAX) sM = MMAX;
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lActual = (unsigned long)((FI * sM) / (sN * lPDiv));
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lError = (lActual > dwFreq) ? (lActual - dwFreq) : (dwFreq - lActual);
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if ( lError < lBestErr) {
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sNBest = sN;
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sMBest = sM;
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lBestErr = lError;
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lBestFreq = lActual;
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} /* if best */
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} /* for sN */
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if(sNBest == 0) return(FXFALSE);
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sM = sMBest-2;
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sN = sNBest-2;
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clkTiming->freq = (float)(dwFreq / 1000000.0f);
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clkTiming->clkTiming_M = sM;
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clkTiming->clkTiming_P = sP;
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clkTiming->clkTiming_N = sN;
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if(dwFreq < 37000000) {
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clkTiming->clkTiming_L = 0xa;
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clkTiming->clkTiming_IB = 0x6;
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} else if(dwFreq < 45000000) {
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clkTiming->clkTiming_L = 0xc;
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clkTiming->clkTiming_IB = 0x4;
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} else if(dwFreq < 58000000) {
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clkTiming->clkTiming_L = 0x8;
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clkTiming->clkTiming_IB = 0x4;
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} else if(dwFreq < 66000000) {
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clkTiming->clkTiming_L = 0xa;
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clkTiming->clkTiming_IB = 0x6;
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} else {
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clkTiming->clkTiming_L = 0xa;
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clkTiming->clkTiming_IB = 0x8;
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}
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return FXTRUE;
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} /* sst1InitComputeClkParamsATT_Int() */
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/*
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** sst1UsrSetGrxClk():
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** Initialize FBI and TREX Memory clocks to a user value
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** NOTE: sst1InitCalcGrxClk() must be called prior to sst1InitGrxClk()
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** NOTE: sst1InitGrxClk() resets the PCI fifo and the graphics subsystem of FBI
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**
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*/
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FxBool
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sst1SetGrxClk_Canopus(FxU32* sstbase, FFLOAT grxclk)
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{
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FxBool RetVal;
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sst1ClkTimingStruct sstGrxClk;
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if(!sst1InitCheckBoard(sstbase))
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return(FXFALSE);
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if(!sst1InitComputeClkParamsATT_Int(grxclk * CLOCK_MULTIPLIER, &sstGrxClk))
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return(FXFALSE);
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sst1CurrentBoard->initGrxClkDone = 0; // Allow clk to be reset to user value.
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RetVal = sst1InitSetGrxClk(sstbase, &sstGrxClk);
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sst1CurrentBoard->initGrxClkDone = 0; // Allow clk to be set to the choosen value again
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return(RetVal);
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}
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#ifdef __WIN32__
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#pragma optimize ("",on)
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#endif
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