143 lines
5.8 KiB
C++
143 lines
5.8 KiB
C++
/*-*-c++-*-*/
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#ifndef __CVGINFO_H__
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#define __CVGINFO_H__
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/*
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** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
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** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
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** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
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** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
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** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
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** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
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** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
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** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
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**
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** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
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** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
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** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
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** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
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** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
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** THE UNITED STATES.
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**
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** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
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**
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** $Revision$
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** $Date$
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*/
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#if defined(__unix__) && ! defined(__CVGREGS_H__)
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// basic data types
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#define FxU32 unsigned int
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#define FxBool int
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// defn of registers not reqd, treat (SstRegs *) as (void *)
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typedef void SstRegs;
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#endif
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#define MAX_NUM_TMUS 3
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// Video timing data structure
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typedef struct {
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FxU32 hSyncOn;
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FxU32 hSyncOff;
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FxU32 vSyncOn;
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FxU32 vSyncOff;
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FxU32 hBackPorch;
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FxU32 vBackPorch;
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FxU32 xDimension;
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FxU32 yDimension;
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FxU32 refreshRate;
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FxU32 miscCtrl;
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FxU32 memOffset;
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FxU32 tilesInX;
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FxU32 vFifoThreshold;
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FxBool video16BPPIsOK;
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FxBool video24BPPIsOK;
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float clkFreq16bpp;
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float clkFreq24bpp;
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} sst1VideoTimingStruct;
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/* Init code client callbacks to allow the init code to use the client
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* command fifo management code to do writes etc.
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*/
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typedef void (*FxSet32Proc)(volatile FxU32* const addr, const FxU32 val);
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/*
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** CVG Device Information Structure
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**
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*/
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// Initialization and configuration data structure
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typedef struct {
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FxU32 size; // size of this structure
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SstRegs *virtAddr[2]; // virtual memory base address
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FxU32 physAddr[2]; // physical memory base address
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FxU32 deviceNumber; // PCI device number
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FxU32 vendorID; // PCI vendor ID
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FxU32 deviceID; // PCI device ID
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FxU32 fbiRevision; // FBI revision number
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FxU32 fbiFab; // FBI Fab ID
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FxU32 fbiBoardID; // FBI board ID (poweron strapping bits)
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FxU32 fbiVideo16BPP; // FBI video display mode
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FxU32 fbiVideoWidth; // FBI video display X-resolution
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FxU32 fbiVideoHeight; // FBI video display Y-resolution
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FxU32 fbiVideoRefresh; // FBI video refresh rate
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FxU32 fbiVideoColBuffs; // FBI video number of color buffers
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FxU32 fbiVideoAuxBuffs; // FBI video number of Aux buffers
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FxU32 fbiVideoMemOffset; // FBI video memory offset (in pages)
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FxU32 fbiVideoTilesInX; // FBI video memory 32x32 tiles-in-X
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sst1VideoTimingStruct // FBI video resolution
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*fbiVideoStruct; // data structure
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FxU32 fbiVideoDacType; // FBI video dac type detected
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FxU32 fbiMemoryFifoEn; // FBI Memory Fifo enabled
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FxU32 fbiCmdFifoEn; // FBI Command Fifo enabled
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FxU32 fbiLfbLocked; // FBI frame buffer is locked
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FxU32 fbiConfig; // FBI strapping pins
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FxU32 fbiGrxClkFreq; // FBI graphics clock frequency
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FxU32 fbiMemSize; // FBI frame buffer memory (in MBytes)
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FxU32 fbiInitGammaDone; // FBI gamma table initialized
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double fbiGammaRed; // FBI Red gamma value
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double fbiGammaGreen; // FBI Green gamma value
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double fbiGammaBlue; // FBI Blue gamma value
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FxU32 fbiNandTree; // FBI Nand tree delay value
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FxU32 fbiNorTree; // FBI Nor tree delay value
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FxU32 tmuRevision; // TMU revision number (for all TMUs)
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FxU32 tmuFab[MAX_NUM_TMUS]; // TMU Fab ID (for all TMUs)
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FxU32 numberTmus; // Number of TMUs installed
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FxU32 tmuConfig; // TMU configuration bits
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FxU32 tmuGrxClkFreq; // TMU graphics clock frequency
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FxU32 tmuMemSize[MAX_NUM_TMUS]; // TMU texture memory (in MBytes)
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// Registers which cannot be read from the hardware, so we shadow them here
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FxU32 tmuInit0[MAX_NUM_TMUS]; // TMU initialization registers
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FxU32 tmuInit1[MAX_NUM_TMUS]; // TMU initialization registers
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FxU32 fbiInit6; // FBI initialization register
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FxU32 fbiInitEnable; // FBI PCI Configuration register initEnable
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// Misc
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FxU32 sliDetected; // Scanline interleave detected
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FxU32 sliPaired; // Board part of an sli pair
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FxU32 monitorDetected; // Monitor connection detected
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FxU32 *sliSlaveVirtAddr; // Slave virtual address
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// Set to 0 if SLI is not enabled...
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FxU32 initGrxClkDone; // Grapics clock has been initializated
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FxU32 vgaPassthruDisable; // Value to force SST-1 control of monitor
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FxU32 vgaPassthruEnable; // Value to force VGA control of monitor
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FxU32 memFifoStatusLwm;
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// Client setter callbacks
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FxSet32Proc set32;
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// PCI library stuff
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FxU32 mtrrUncacheable; /* 3d register space (all wraps) */
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FxU32 mtrrWriteCombine; /* command fifo/3d lfb */
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SstRegs *sstCSIM;
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SstRegs *sstHW; // pointer to HW
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} sst1DeviceInfoStruct;
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typedef sst1DeviceInfoStruct FxDeviceInfo;
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#endif /* !__CVGINFO_H__ */
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