97 lines
3.5 KiB
C
97 lines
3.5 KiB
C
#ifndef __H3INFO_H__
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#define __H3INFO_H__
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/*
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** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
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** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
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** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
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** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
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** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
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** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
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** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
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** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
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**
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** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
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** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
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** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
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** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
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** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
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** THE UNITED STATES.
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**
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** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
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*/
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/*
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#if defined(__unix__) && ! defined(__H3REGS_H__)
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// basic data types
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#define FxU8 unsigned char
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#define FxU16 unsigned short
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#define FxU32 unsigned long
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#define FxBool int
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// defn of registers not reqd, treat (SstRegs *) as (void *)
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typedef void SstRegs;
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#endif
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*/
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struct sstregs; /* see h3regs.h */
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#if defined(H4)
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#define MAX_NUM_TMUS 2
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#else
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#define MAX_NUM_TMUS 1
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#endif
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/*
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** H3 Device Information Structure
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**
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*/
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#define MAX_NUM_TMUS_SUPPORTED 4
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#if MAX_NUM_TMUS > MAX_NUM_TMUS_SUPPORTED
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# error "need to increase MAX_NUM_TMUS_SUPPORTED"
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#endif
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typedef struct { // H3 Device Information Structure
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FxU32 size; // size of this structure
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volatile
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struct sstregs *virtAddr[2];// virtual memory base address
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FxU32 physAddr[2]; // physical memory base address
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FxU16 virtPort; // virtual i/o port base address
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FxU16 physPort; // physical i/o port base address
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FxU32 deviceNumber; // PCI device number
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FxU32 vendorID; // PCI vendor ID
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FxU32 deviceID; // PCI device ID
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FxU32 fbiRevision; // FBI revision number
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FxU32 fbiConfig; // FBI strapping pins
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FxU32 fbiMemType; // FBI memory type (poweron strapping bits)
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FxU32 fbiVideoWidth; // FBI video display X-resolution
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FxU32 fbiVideoHeight; // FBI video display Y-resolution
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FxU32 fbiVideoRefresh; // FBI video refresh rate
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FxU32 fbiMemoryFifoEn; // FBI memory fifo enabled
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FxU32 tmuRevision; // TMU revision number (for all TMUs)
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FxU32 numberTmus; // number of TMUs installed
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FxU32 tmuConfig; // TMU configuration bits
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FxU32 fbiMemSize; // FBI frame buffer memory (in MBytes)
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FxU32 tmuMemSize[MAX_NUM_TMUS_SUPPORTED]; // TMU texture memory (in MBytes)
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#ifndef CVG
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FxU8 *agpMem; // AGP true base address
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FxU8 *agpVirtAddr; // AGP virtual base address
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FxU32 agpSizeInBytes; // AGP memory size (in Bytes)
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FxU32 agpBaseAddrH; // upper 4 bits of AGP physical base address
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FxU32 agpBaseAddrL; // lower 32 bits of AGP physical base address
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FxU32 agpRqDepth; // AGP request depth
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#endif
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// These cannot be read from the hardware, so we shadow them here
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FxU32 tmuInit0[MAX_NUM_TMUS_SUPPORTED];
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FxU32 tmuInit1[MAX_NUM_TMUS_SUPPORTED];
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// Misc
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FxU32 initGrxClkDone;
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// CSIM specific
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volatile struct sstregs *sstCSIM; // pointer to CSIM structure
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volatile struct sstregs *sstHW; // pointer to HW
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} FxDeviceInfo;
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#endif /* !__H3INFO_H__ */
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