215 lines
8.4 KiB
C
215 lines
8.4 KiB
C
#ifndef __FXHAL_H__
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#define __FXHAL_H__
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/*
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** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
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** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
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** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
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** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
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** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
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** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
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** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
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** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
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**
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** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
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** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
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** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
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** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
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** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
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** THE UNITED STATES.
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**
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** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
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**
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** $Revision$
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** $Date$
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*/
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#if defined(BUILD_HAL)
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#define FX_DLL_DEFINITION
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#endif
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#include <fxdll.h>
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#include <fxpci.h>
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#include <h3info.h>
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// Just to unconfuse myself:
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//
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// CHIP FBI-REV TMU-REV DEV-ID
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// SST1-0.6u 1 0 1
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// SST1-0.5u 2 1 1
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// SST-96 2 (1) 2
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// H3 A0 1 4 3
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// H3 A1 2 4 3
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// H3 B0 3 4 3
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// H4_OEM 1 4 4
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// H4 1 4 5
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#define SST_DEVICE_ID_SST1 1
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#define SST_DEVICE_ID_SST96 2
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#define SST_DEVICE_ID_H3 3
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#define SST_DEVICE_ID_H4_OEM 4
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#define SST_DEVICE_ID_H4 5
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#define MBYTE(n) (((FxU32)(n))<<20)
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#define DEAD 0xDEAD
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// Maximum number of boards and TMUs supported
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#define HAL_MAX_BOARDS 4
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//----------------------------------------------------------------------
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// the root of all Hal information
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//----------------------------------------------------------------------
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typedef struct {
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int csim;
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int hsim;
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int hw;
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int csimio;
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FxU32 boardsFound; // number of boards found
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FxDeviceInfo boardInfo[HAL_MAX_BOARDS];
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int pollLimit; // number of pixels to poll msg Q after
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int pollCount; // current pixel counter
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int video; // video output enabled
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FxU32 csimLastRead;
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} HalInfo;
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//----------------------------------------------------------------------
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/*
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** SST Hardware Initialization routine protypes
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**
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** If all initialization routines are called, it is assumed they are called
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** in the following order:
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** 0. fxHalInit();
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** 1. fxHalMapBoard();
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** 2. fxHalInitRegisters();
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** 3. fxHalInitGamma();
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** 4. fxHalInitVideo();
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** 5. fxHalShutdown();
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**
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** fxHalShutdown() is called at the end of an application to turn off
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** the graphics subsystem
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**
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*/
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FX_ENTRY void FX_CALL fxHalPutenv(char *buf);
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FX_ENTRY HalInfo * FX_CALL fxHalInit(FxU32 flags);
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FX_ENTRY FxU32 FX_CALL fxHalNumBoardsInSystem(void);
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FX_ENTRY SstRegs * FX_CALL fxHalMapBoard(FxU32 boardNum);
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FX_ENTRY FxBool FX_CALL fxHalInitCmdFifo( SstRegs *sst, int which, FxU32 fifoStart,
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FxU32 size, FxBool directExec, FxBool disableHoles, FxBool agpEnable);
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FX_ENTRY FxBool FX_CALL fxHalInitRegisters(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalInitRenderingRegisters(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalInitGuiRegisters(SstGRegs *sstg);
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FX_ENTRY FxBool FX_CALL fxHalInitCmdAgpRegisters(SstCRegs *sstc);
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FX_ENTRY FxBool FX_CALL fxHalInitGamma(SstRegs *sst, FxFloat gamma);
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FX_ENTRY FxBool FX_CALL fxHalInitGammaRGB(SstRegs *sst, FxFloat r, FxFloat g, FxFloat b);
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FX_ENTRY FxBool FX_CALL fxHalInitVideo(SstRegs *sst, FxU32 resolution,
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FxU32 refresh, FxVideoTimingInfo *);
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FX_ENTRY FxBool FX_CALL fxHalIdle(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalIdleNoNop(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalIdle2(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalIdleNoNop2(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalInitUSWC(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalShutdown(SstRegs *sst);
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FX_ENTRY void FX_CALL fxHalShutdownAll(void);
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FX_ENTRY FxBool FX_CALL fxHalGetDeviceInfo(SstRegs *sst, FxDeviceInfo *);
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FX_ENTRY FxBool FX_CALL fxHalVsync(SstRegs *sst);
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FX_ENTRY FxBool FX_CALL fxHalVsyncNot(SstRegs *sst);
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FX_ENTRY void FX_CALL
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fxHalInitVideoOverlaySurface(
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SstRegs *sst, // pointer to hw
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FxU32 enable, // 1=enable Overlay surface (OS), 1=disable
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FxU32 stereo, // 1=enable OS stereo, 0=disable
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FxU32 horizScaling, // 1=enable horizontal scaling, 0=disable
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FxU32 dudx, // horizontal scale factor (ignored if not
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// scaling)
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FxU32 verticalScaling, // 1=enable vertical scaling, 0=disable
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FxU32 dvdy, // vertical scale factor (ignored if not
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// scaling)
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FxU32 filterMode, // duh
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FxU32 tiled, // 0=OS linear, 1=tiled
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FxU32 pixFmt, // pixel format of OS
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FxU32 clutBypass, // bypass clut for OS?
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FxU32 clutSelect, // 0=lower 256 CLUT entries, 1=upper 256
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FxU32 startAddress, // board address of beginning of OS
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FxU32 stride); // distance between scanlines of the OS, in
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// units of bytes for linear OS's and
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// tiles for tiled OS's
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#if !defined(MSVC16) && !defined(THUNK32) && !defined(DIRECTX)
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#define GET8(s) s
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#define GET16(s) s
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#define GET(s) s
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#define SET8(d,s) d = s
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#define SET16(d,s) d = s
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#define SET(d,s) d = s
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#define SETF(d,s) (*(float *)&(d)) = s
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#define AGPMEMINIT() GDBG_ERROR("AGPMEMINIT","nyi for hardware\n");
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#define AGPMEMALLOC(sst,size) GDBG_ERROR("AGPMEMALLOC","nyi for hardware\n");
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#define AGPWRV(v,d) (v) = (d)
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#define AGPRDV(v) (v)
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#define AGPWRP(aHi,aLo,d) AGPWRV( *agpPhysToVirt(aHi,aLo), d )
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#define AGPRDP(aHi,aLo) AGPRDP( *agpPhysToVirt(aHi,aLo) )
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#define GET_IO8(p) pioInByte(p)
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#define GET_IO16(p) pioInWord(p)
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#define GET_IO(p) pioInLong(p)
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#define SET_IO8(p,d) pioOutByte(p,d)
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#define SET_IO16(p,d) pioOutWord(p,d)
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#define SET_IO(p,d) pioOutLong(p,d)
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#endif // #if !defined(MSVC16) && !defined(THUNK32) && !defined(DIRECTX)
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//---------------------------------------------------------------------------
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// internal HAL stuff not meant for external use
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//---------------------------------------------------------------------------
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#if defined(BUILD_HAL) || defined(BUILD_DIAGS)
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// GMT: Init code SET/GET always go thru subroutines (allows for P6 fencing)
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#define IGET(A) fxHalRead32((FxU32 *) &(A))
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#define ISET(A,D) fxHalWrite32((FxU32 *) &(A), D)
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// this is the FAKE address where the hardware lives
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// we use a large address so attempts to write to it get an access violation
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// and it has 28 zero bits so that we can easily figure out the board number
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// and the offset into the board
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#define SST_BAD_ADDRESS(a) (((FxU32)a&0xF0000000)==0 || ((FxU32)a&0x0C000000)!=0)
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#define SST_FAKE_ADDRESS_MAKE(boardNum) (SstRegs *)(0x200000|((boardNum+1)<<28))
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#define SST_FAKE_ADDRESS_GET_BOARD(a) ((((FxU32)a>>28)&0xF)-1)
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#define SST_FAKE_ADDRESS_GET_OFFSET(a) ((FxU32)a&0x0FFFFFFF)
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#define SST_FAKE_ADDRESS_GET_BASE_OFFSET(a) ((FxU32)a&0x01FFFFFF)
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#define SST_FAKE_ADDRESS_GET_BASE(a) ( ((FxU32)a&BIT(25))>>25 )
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#define SST_BAD_PORT(a) (((FxU32)a&0xF000)==0)
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#define SST_FAKE_PORT_MAKE(boardNum) (FxU16)((boardNum+1)<<12)
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#define SST_FAKE_PORT_GET_BOARD(a) ((((FxU16)a>>12)&0xF)-1)
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#define SST_FAKE_PORT_GET_OFFSET(a) ((FxU16)a&0x0FFF)
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extern HalInfo halInfo;
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// internal HAL routines
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FxU32 fxHalRead32(FxU32 *addr);
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void fxHalWrite32(FxU32 *addr, FxU32 data);
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void fxHalResetBoardInfo( FxDeviceInfo *info );
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FxBool fxHalFillDeviceInfo( SstRegs *sst );
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// FxBool fxHalGetFbiInfo( SstRegs *sst, FxDeviceInfo *info );
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// FxBool fxHalGetTmuInfo( SstRegs *sst, FxDeviceInfo *info );
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FxBool fxHalVaddrToBoardNumber( SstRegs *sst, FxU32 *boardNumber );
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// GUI interface
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FX_ENTRY void FX_CALL guiNewViewWindow(FxU32 boardNumber, const char *name);
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void guiReadMessageQueue(void);
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FxBool guiOpen( FxU32 boardNumber );
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void guiShutdown( SstRegs *sst );
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#endif /* BUILD_HAL */
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#endif /* !__FXHAL_H__ */
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