133 lines
4.9 KiB
C
133 lines
4.9 KiB
C
/*
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** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
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** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
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** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
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** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
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** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
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** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
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** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
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** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
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**
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** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
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** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
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** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
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** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
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** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
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** THE UNITED STATES.
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**
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** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
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*/
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#ifndef __H3CINIT_H__
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#define __H3CINIT_H__
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#include <3dfx.h>
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#define H3_GRXCLK_SPEED 100
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#define H4_GRXCLK_SPEED 143
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#define H4_OEM_GRXCLK_SPEED 141
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#define H4_BRINGUP_GRXCLK_SPEED 100
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#ifdef H4
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#define DEFAULT_GRXCLK_SPEED H4_BRINGUP_GRXCLK_SPEED
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#else
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#define DEFAULT_GRXCLK_SPEED H3_GRXCLK_SPEED
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#endif
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FxU32 // return # of MB of memory
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h3InitGetMemSize(FxU32 regBase); // init register base
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FxU32 // return # of MB of memory
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h3InitSgram(FxU32 regBase, // init iegister base
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FxU32 sgramMode,
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FxU32 sgramMask,
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FxU32 sgramColor,
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char *vendorName); // NULL or name of SGRAM vendor
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void
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h3InitPlls(FxU32 regBase, // init iegister base
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FxU32 grxSpeedInMHz, // desired GRX clock frequency (MHz)
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FxU32 memSpeedInMHz); // desired MEM clock frequency (MHz)
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void
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h4InitPlls(FxU32 regBase, // init register base
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FxU32 deviceID, // H4 or H4_OEM
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FxU32 grxSpeedInMHz); // desired clock frequency (MHz)
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void
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h3InitVga(
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FxU32 regBase, // memory base address
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FxU32 legacyDecode); // 1=enable VGA decode, 0=disable
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void
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h3InitVideoProc(
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FxU32 regBase, // memory base address
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FxU32 vidProcCfg); // vidProcCfg register control bits
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FxBool
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h3InitSetVideoMode(
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FxU32 regBase, // memory base address
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FxU32 xRes, // x resolution
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FxU32 yRes, // y resolution
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FxU32 refresh, // refresh freq
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#if defined(H3VDD) && defined(H3_B0)
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FxU32 loadClut, // really a bool, should we load the lookup table
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FxU32 scanlinedouble); // set scanline double bit and double y?
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#else
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FxU32 loadClut) ; // initialize clut entries?
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#endif
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void
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h3InitVideoDesktopSurface(
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FxU32 regBase,
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FxU32 enable, // 1=enable desktop surface (DS), 1=disable
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FxU32 tiled, // 0=DS linear, 1=tiled
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FxU32 pixFmt, // pixel format of DS
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FxU32 clutBypass, // bypass clut for DS?
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FxU32 clutSelect, // 0=lower 256 CLUT entries, 1=upper 256
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FxU32 startAddress, // board address of beginning of DS
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FxU32 stride); // distance between scanlines of the DS, in
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// units of bytes for linear DS's and tiles for
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// tiled DS's
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void
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h3InitVideoOverlaySurface(
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FxU32 regBase,
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FxU32 enable, // 1=enable Overlay surface (OS), 1=disable
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FxU32 stereo, // 1=enable OS stereo, 0=disable
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FxU32 horizScaling, // 1=enable horizontal scaling, 0=disable
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FxU32 dudx, // horizontal scale factor (ignored if not
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// scaling)
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FxU32 verticalScaling, // 1=enable vertical scaling, 0=disable
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FxU32 dvdy, // vertical scale factor (ignored if not
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// scaling)
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FxU32 filterMode, // duh
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FxU32 tiled, // 0=OS linear, 1=tiled
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FxU32 pixFmt, // pixel format of OS
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FxU32 clutBypass, // bypass clut for OS?
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FxU32 clutSelect, // 0=lower 256 CLUT entries, 1=upper 256
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FxU32 startAddress, // board address of beginning of OS
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FxU32 stride); // distance between scanlines of the OS, in
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// units of bytes for linear OS's and tiles for
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// tiled OS's
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#ifndef H3VDD
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void
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h3InitMeasureSiProcess(
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FxU32 regBase); // init register base
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#endif // #ifndef H3VDD
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void
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h3InitBlockWrite(
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FxU32 regBase,
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FxU32 enable, // 1=enable block writes, 0=disable
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FxU32 threshhold); // block write threshhold
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void
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h3InitResetAll(
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FxU32 regBase); // init register base
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#endif /* __H3CINIT_H__ */
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