diff --git a/glide3x/h5/glide3/src/cpudtect.c b/glide3x/h5/glide3/src/cpudtect.c new file mode 100644 index 0000000..24f0001 --- /dev/null +++ b/glide3x/h5/glide3/src/cpudtect.c @@ -0,0 +1,21 @@ +#ifdef __alpha__ + +#include +#include + +#include <3dfx.h> +#include + +#define FX_DLL_DEFINITION +#include +#include +#include "fxglide.h" + +#define NOT_PENTIUM 4 /* see cpudetect.S */ + +extern FxI32 GR_CDECL +_cpu_detect_asm(void) +{ + return(NOT_PENTIUM); +} +#endif diff --git a/glide3x/h5/glide3/src/cpudtect.s b/glide3x/h5/glide3/src/cpudtect.s index c2a23ef..e1cfc7e 100644 --- a/glide3x/h5/glide3/src/cpudtect.s +++ b/glide3x/h5/glide3/src/cpudtect.s @@ -20,6 +20,10 @@ /* $Header$ * /* $Log$ +/* Revision 1.2 2000/06/27 19:59:34 joseph +/* Previous checkin of asm files were already preprocessed. +/* Fixed build rules for 3DNow optimized assembly. +/* /* Revision 1.1 2000/06/15 00:27:42 josep /* Initial checkin into SourceForge / @@ -47,6 +51,20 @@ /* 2 3/04/97 9:10p Dow */ +#ifdef __ia64__ + + .align 32 + .global _cpu_detect_asm + .proc _cpu_detect_asm + +_cpu_detect_asm: + mov ret0=0 + br.ret.sptk.few b0 + + .end _cpu_detect_asm + +#else /* !__ia64__ */ + .file "cpudtect.asm" @@ -322,3 +340,4 @@ double_precision_asm: .size double_precision_asm,.L_END_double_precision_asm-double_precision_asm .end +#endif diff --git a/glide3x/h5/glide3/src/diget.c b/glide3x/h5/glide3/src/diget.c index 32ef3c7..fa3eba9 100644 --- a/glide3x/h5/glide3/src/diget.c +++ b/glide3x/h5/glide3/src/diget.c @@ -19,6 +19,10 @@ ** ** $Header$ ** $Log$ +** Revision 1.2 2000/06/26 21:26:24 joseph +** Merged with 3dfx internal source repository so that the source base stays +** up to date. +** ** ** 93 9/09/99 4:19p Adamb ** Added TEXTUREBUFFER to GR_EXTENSION string @@ -725,11 +729,11 @@ GR_DIENTRY(grGet, FxU32, (FxU32 pname, FxU32 plength, FxI32 *params)) break; case GR_SURFACE_TEXTURE: - if (plength == 4) { + if (plength == sizeof(long)) { GR_DCL_GC; #ifdef GLIDE_INIT_HWC - *params = (FxU32) &gc->tBuffer; + *params = (AnyPtr) &gc->tBuffer; retVal = plength; #endif } diff --git a/glide3x/h5/glide3/src/disst.c b/glide3x/h5/glide3/src/disst.c index b7879e3..b3e1076 100644 --- a/glide3x/h5/glide3/src/disst.c +++ b/glide3x/h5/glide3/src/disst.c @@ -182,7 +182,7 @@ GR_DIENTRY(grSstSelect, void, ( int which )) GrErrorCallback( "grSstSelect: non-existent SST", FXTRUE ); _GlideRoot.current_sst = which; - setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] ); + setThreadValue( (AnyPtr)&_GlideRoot.GCs[_GlideRoot.current_sst] ); #ifdef GLIDE_MULTIPLATFORM _GlideRoot.curGCFuncs = _GlideRoot.curGC->gcFuncs; diff --git a/glide3x/h5/glide3/src/distrip.c b/glide3x/h5/glide3/src/distrip.c index e6e3925..53f9b0a 100644 --- a/glide3x/h5/glide3/src/distrip.c +++ b/glide3x/h5/glide3/src/distrip.c @@ -495,7 +495,7 @@ GR_DIENTRY(grDrawVertexArrayContiguous, void , (FxU32 mode, FxU32 Count, void *p FxU32 i; for (i = 0; i < Count; i++) GDBG_INFO(110, "%s: pointers[%d] = 0x%x\n", - FN_NAME, i, (int)pointers + gc->state.vData.vStride * i); + FN_NAME, i, (long)pointers + gc->state.vData.vStride * i); } #endif @@ -550,10 +550,10 @@ GR_DIENTRY(grDrawVertexArrayContiguous, void , (FxU32 mode, FxU32 Count, void *p else { void *b_ptr, *c_ptr; while ((int)Count >= 3) { - b_ptr = (void *)((FxU32)pointers + stride); - c_ptr = (void *)((FxU32)pointers + stride*2); + b_ptr = (void *)((AnyPtr)pointers + stride); + c_ptr = (void *)((AnyPtr)pointers + stride*2); TRISETUP(pointers, b_ptr, c_ptr); - pointers = (void *)((FxU32)c_ptr + stride); + pointers = (void *)((AnyPtr)c_ptr + stride); Count -= 3; } } diff --git a/glide3x/h5/glide3/src/fifo.c b/glide3x/h5/glide3/src/fifo.c index b7fa267..0b53ded 100644 --- a/glide3x/h5/glide3/src/fifo.c +++ b/glide3x/h5/glide3/src/fifo.c @@ -498,7 +498,7 @@ static const char * h3SstIORegNames[] = { } ; -#define GEN_INDEX(a) ((((FxU32) a) - ((FxU32) gc->reg_ptr)) >> 2) +#define GEN_INDEX(a) ((((AnyPtr) a) - ((AnyPtr) gc->reg_ptr)) >> 2) void _grFifoWriteDebug(FxU32 addr, FxU32 val, FxU32 fifoPtr) @@ -719,7 +719,7 @@ _FifoFlush( void ) #undef FN_NAME } /* _FifoFlush */ -FxU32 _grHwFifoPtrSlave(FxU32 slave, FxBool ignored); +AnyPtr _grHwFifoPtrSlave(FxU32 slave, FxBool ignored); void FX_CALL _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int fLine) @@ -743,9 +743,9 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int /* Update to the currently writing command buffer */ fifo.cmdBuf.baseAddr += cmdBufferOffset; fifo.cmdBuf.hwOffset += cmdBufferOffset; - fifo.cmdBuf.size = ((FxU32)gcFifo->fifoPtr - fifo.cmdBuf.baseAddr); + fifo.cmdBuf.size = ((AnyPtr)gcFifo->fifoPtr - fifo.cmdBuf.baseAddr); - fifo.stateBuf.baseAddr = (FxU32)gcFifo->stateBuffer; + fifo.stateBuf.baseAddr = (AnyPtr)gcFifo->stateBuffer; fifo.stateBuf.hwOffset += (gcFifo->hwcFifoInfo.stateBuf.allocUnit * gcFifo->curCommandBuf); fifo.stateBuf.size = sizeof(GrStateBuffer); @@ -791,7 +791,7 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int gcFifo->curCommandBuf = nextBufferIndex; /* Set the current fifo ptr in allocation blocks */ - gcFifo->fifoPtr = (FxU32*)(gcFifo->hwcFifoInfo.cmdBuf.baseAddr + + gcFifo->fifoPtr = (AnyPtr*)(gcFifo->hwcFifoInfo.cmdBuf.baseAddr + (gcFifo->hwcFifoInfo.cmdBuf.allocUnit * gcFifo->curCommandBuf)); /* Set the state buffer to be the 'next' one in the ready @@ -868,7 +868,7 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int gc->contextP = 1; /* always has context in CSIM */ #endif /* defined(GLIDE_INIT_HWC) && !defined(__linux__) */ if (gc->contextP) { - FxU32 wrapAddr = 0x00UL; + AnyPtr wrapAddr = 0x00UL; FxU32 checks; GR_ASSERT(blockSize > 0); @@ -906,12 +906,12 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int "\tfifoRoom: (0x%X : 0x%X) : (0x%X : 0x%X)\n" "\tfifo hw: (0x%X : 0x%X)\n", ((fName == NULL) ? "Unknown" : fName), fLine, - (((FxU32)gc->cmdTransportInfo.fifoPtr - (FxU32)gc->cmdTransportInfo.fifoStart) + + (((AnyPtr)gc->cmdTransportInfo.fifoPtr - (AnyPtr)gc->cmdTransportInfo.fifoStart) + (FxU32)gc->cmdTransportInfo.fifoOffset), blockSize, gc->cmdTransportInfo.roomToReadPtr, gc->cmdTransportInfo.roomToEnd, gc->cmdTransportInfo.fifoRoom, writes, - HW_FIFO_PTR(FXTRUE) - (FxU32)gc->rawLfb, gc->cmdTransportInfo.fifoRead); + HW_FIFO_PTR(FXTRUE) - (AnyPtr)gc->rawLfb, gc->cmdTransportInfo.fifoRead); #endif /* GDBG_INFO_ON */ @@ -929,25 +929,25 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int again: /* do we need to stall? */ { - FxU32 lastHwRead = gc->cmdTransportInfo.fifoRead; + AnyPtr lastHwRead = gc->cmdTransportInfo.fifoRead; FxI32 roomToReadPtr = gc->cmdTransportInfo.roomToReadPtr; while (roomToReadPtr < blockSize) { - FxU32 curReadPtr = HW_FIFO_PTR(FXTRUE); - FxU32 curReadDist = curReadPtr - lastHwRead; + AnyPtr curReadPtr = HW_FIFO_PTR(FXTRUE); + FxI32 curReadDist = curReadPtr - lastHwRead; /* Handle slave chips. This code lifted from cvg and modified * to deal with multiple slave chips. */ if(gc->chipCount > 1) { FxU32 slave; for(slave = 1; slave < gc->chipCount; slave++) { - const FxU32 slaveReadPtr = _grHwFifoPtrSlave(slave, 0); + const AnyPtr slaveReadPtr = _grHwFifoPtrSlave(slave, 0); const FxU32 slaveReadDist = (slaveReadPtr - lastHwRead); FxI32 distSlave = (FxI32)slaveReadDist; FxI32 distMaster = (FxI32)curReadDist; - GR_ASSERT((slaveReadPtr >= (FxU32)gc->cmdTransportInfo.fifoStart) && - (slaveReadPtr < (FxU32)gc->cmdTransportInfo.fifoEnd)); + GR_ASSERT((slaveReadPtr >= (AnyPtr)gc->cmdTransportInfo.fifoStart) && + (slaveReadPtr < (AnyPtr)gc->cmdTransportInfo.fifoEnd)); /* Get the actual absolute distance to the respective fifo ptrs */ if (distSlave < 0) distSlave += (FxI32)gc->cmdTransportInfo.fifoSize - FIFO_END_ADJUST; @@ -1023,8 +1023,8 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int checks = 0; } #endif /* GLIDE_DEBUG */ - GR_ASSERT((curReadPtr >= (FxU32)gc->cmdTransportInfo.fifoStart) && - (curReadPtr < (FxU32)gc->cmdTransportInfo.fifoEnd)); + GR_ASSERT((curReadPtr >= (AnyPtr)gc->cmdTransportInfo.fifoStart) && + (curReadPtr < (AnyPtr)gc->cmdTransportInfo.fifoEnd)); roomToReadPtr += curReadDist; @@ -1036,8 +1036,8 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int lastHwRead = curReadPtr; } - GR_ASSERT((lastHwRead >= (FxU32)gc->cmdTransportInfo.fifoStart) && - (lastHwRead < (FxU32)gc->cmdTransportInfo.fifoEnd)); + GR_ASSERT((lastHwRead >= (AnyPtr)gc->cmdTransportInfo.fifoStart) && + (lastHwRead < (AnyPtr)gc->cmdTransportInfo.fifoEnd)); /* Update cached copies */ gc->cmdTransportInfo.fifoRead = lastHwRead; @@ -1084,7 +1084,7 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int P6FENCE; - wrapAddr = (FxU32)gc->cmdTransportInfo.fifoPtr; + wrapAddr = (AnyPtr)gc->cmdTransportInfo.fifoPtr; /* Update roomXXX fields for the actual wrap */ gc->cmdTransportInfo.roomToReadPtr -= gc->cmdTransportInfo.roomToEnd; @@ -1117,12 +1117,12 @@ _grCommandTransportMakeRoom(const FxI32 blockSize, const char* fName, const int "\tfifoBlock: (0x%X : 0x%X)\n" "\tfifoRoom: (0x%X : 0x%X : 0x%X)\n" "\tfifo hw: (0x%X : 0x%X) : (0x%X : 0x%X : 0x%X)\n", - (((FxU32)gc->cmdTransportInfo.fifoPtr - (FxU32)gc->cmdTransportInfo.fifoStart) + + (((AnyPtr)gc->cmdTransportInfo.fifoPtr - (AnyPtr)gc->cmdTransportInfo.fifoStart) + (FxU32)gc->cmdTransportInfo.fifoOffset), blockSize, gc->cmdTransportInfo.roomToReadPtr, gc->cmdTransportInfo.roomToEnd, gc->cmdTransportInfo.fifoRoom, - HW_FIFO_PTR(FXTRUE) - (FxU32)gc->rawLfb, gc->cmdTransportInfo.fifoRead, + HW_FIFO_PTR(FXTRUE) - (AnyPtr)gc->rawLfb, gc->cmdTransportInfo.fifoRead, GR_CAGP_GET(depth), GR_CAGP_GET(holeCount), GR_GET(hw->status)); FIFO_ASSERT(); @@ -1162,10 +1162,10 @@ _grH3FifoDump_Linear(const FxU32* const linearPacketAddr) } -FxU32 +AnyPtr _grHwFifoPtr(FxBool ignored) { - FxU32 rVal = 0; + AnyPtr rVal = 0; FxU32 status, readPtrL1, readPtrL2; FxU32 chip ; /* AJB SLI MAYHEM */ @@ -1224,7 +1224,7 @@ _grHwFifoPtr(FxBool ignored) readPtrL2 = GET(gc->cRegs->cmdFifo0.readPtrL); } while (readPtrL1 != readPtrL2); } - rVal = (((FxU32)gc->cmdTransportInfo.fifoStart) + + rVal = (((AnyPtr)gc->cmdTransportInfo.fifoStart) + readPtrL2 - (FxU32)gc->cmdTransportInfo.fifoOffset); } @@ -1232,10 +1232,10 @@ _grHwFifoPtr(FxBool ignored) } /* _grHwFifoPtr */ -FxU32 +AnyPtr _grHwFifoPtrSlave(FxU32 slave, FxBool ignored) { - FxU32 rVal = 0; + AnyPtr rVal = 0; FxU32 status, readPtrL1, readPtrL2; GR_DCL_GC; @@ -1250,7 +1250,7 @@ _grHwFifoPtrSlave(FxU32 slave, FxBool ignored) readPtrL2 = GET(gc->slaveCRegs[slave-1]->cmdFifo0.readPtrL); } while (readPtrL1 != readPtrL2); - rVal = (((FxU32)gc->cmdTransportInfo.fifoStart) + + rVal = (((AnyPtr)gc->cmdTransportInfo.fifoStart) + readPtrL2 - (FxU32)gc->cmdTransportInfo.fifoOffset); @@ -1354,8 +1354,23 @@ _reg_group_begin_internal_wax( FxU32 __regBase, #ifdef __linux__ +#ifdef __alpha__ +unsigned char _fxget8( unsigned char *pval ) { + __asm__ __volatile__("mb": : :"memory"); + return( *pval ); +} +unsigned short _fxget16( unsigned short *pval ) { + __asm__ __volatile__("mb": : :"memory"); + return( *pval ); +} +unsigned int _fxget32( unsigned int *pval ) { + __asm__ __volatile__("mb": : :"memory"); + return( *pval ); +} +#endif /* __alpha__ */ + void -_grImportFifo(int fifoPtr, int fifoRead) { +_grImportFifo(AnyPtr fifoPtr, AnyPtr fifoRead) { struct cmdTransportInfo* gcFifo; FxU32 readPos; GR_DCL_GC; @@ -1374,13 +1389,13 @@ _grImportFifo(int fifoPtr, int fifoRead) { gcFifo=&gc->cmdTransportInfo; readPos=readPos-gcFifo->fifoOffset; gcFifo->fifoPtr = gcFifo->fifoStart + (readPos>>2); - gcFifo->fifoRead = (FxU32)gcFifo->fifoPtr; + gcFifo->fifoRead = (AnyPtr)gcFifo->fifoPtr; #else gcFifo=&gc->cmdTransportInfo; gcFifo->fifoPtr = gc->rawLfb+(fifoPtr>>2); gcFifo->fifoRead = ((int)gc->rawLfb)+fifoRead; #endif - gcFifo->roomToReadPtr = gcFifo->fifoRead-((int)gcFifo->fifoPtr)-FIFO_END_ADJUST-sizeof(FxU32); + gcFifo->roomToReadPtr = gcFifo->fifoRead-((AnyPtr)gcFifo->fifoPtr)-FIFO_END_ADJUST-sizeof(FxU32); if (gcFifo->roomToReadPtr<0) gcFifo->roomToReadPtr+=gcFifo->fifoSize; gcFifo->roomToEnd = gcFifo->fifoSize - ((gcFifo->fifoPtr-gcFifo->fifoStart)<<2) - @@ -1393,12 +1408,12 @@ _grImportFifo(int fifoPtr, int fifoRead) { } void -_grExportFifo(int *fifoPtr, int *fifoRead) { +_grExportFifo(FxU32 *fifoPtr, FxU32 *fifoRead) { struct cmdTransportInfo* gcFifo; GR_DCL_GC; gcFifo=&gc->cmdTransportInfo; *fifoPtr=(gcFifo->fifoPtr-gc->rawLfb)<<2; - *fifoRead=(gcFifo->fifoRead-(int)gc->rawLfb); + *fifoRead=(gcFifo->fifoRead-(AnyPtr)gc->rawLfb); } int diff --git a/glide3x/h5/glide3/src/fxcmd.h b/glide3x/h5/glide3/src/fxcmd.h index e7454ae..a962ef6 100644 --- a/glide3x/h5/glide3/src/fxcmd.h +++ b/glide3x/h5/glide3/src/fxcmd.h @@ -186,6 +186,12 @@ extern FxU32 _grGet32(volatile FxU32* const sstAddr); #endif /* USE_PACKET_FIFO */ +#ifdef __linux__ +void _grImportFifo(AnyPtr fifoPtr, AnyPtr fifoRead); +void _grExportFifo(FxU32 *fifoPtr, FxU32 *fifoRead); +void _grInvalidateAll(void); +#endif + #if !USE_PACKET_FIFO /* NOTE: fifoFree is the number of entries, each is 8 bytes */ #define GR_CHECK_FOR_ROOM(n,p) \ @@ -220,7 +226,7 @@ do { \ /* NB: This should be used sparingly because it does a 'real' hw read * which is *SLOW*. */ -FxU32 _grHwFifoPtr(FxBool); +AnyPtr _grHwFifoPtr(FxBool); #define HW_FIFO_PTR(a) _grHwFifoPtr(a) #if FIFO_ASSERT_FULL @@ -231,7 +237,7 @@ FxU32 _grHwFifoPtr(FxBool); #else /* !FIFO_ASSERT_FULL */ #define FIFO_ASSERT() \ ASSERT_FAULT_IMMED((FxU32)gc->cmdTransportInfo.fifoRoom < gc->cmdTransportInfo.fifoSize); \ -ASSERT_FAULT_IMMED((FxU32)gc->cmdTransportInfo.fifoPtr < (FxU32)gc->cmdTransportInfo.fifoEnd) +ASSERT_FAULT_IMMED((AnyPtr)gc->cmdTransportInfo.fifoPtr < (AnyPtr)gc->cmdTransportInfo.fifoEnd) #endif /* !FIFO_ASSERT_FULL */ #if (GLIDE_PLATFORM & GLIDE_OS_WIN32) @@ -294,7 +300,7 @@ do {\ #define GR_CHECK_FOR_ROOM(__n, __p) \ do { \ const FxU32 writeSize = (__n) + ((__p) * sizeof(FxU32)); /* Adjust for size of hdrs */ \ - ASSERT(((FxU32)(gc->cmdTransportInfo.fifoPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ + ASSERT(((AnyPtr)(gc->cmdTransportInfo.fifoPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ ASSERT(writeSize < gc->cmdTransportInfo.fifoSize - sizeof(FxU32)); \ FIFO_ASSERT(); \ if (gc->cmdTransportInfo.fifoRoom < (FxI32)writeSize) { \ @@ -323,7 +329,7 @@ if (gc->cmdTransportInfo.autoBump) {\ } #define GR_SET_FIFO_PTR(__n, __p) \ - gc->checkPtr = (FxU32)gc->cmdTransportInfo.fifoPtr; \ + gc->checkPtr = (AnyPtr)gc->cmdTransportInfo.fifoPtr; \ gc->checkCounter = ((__n) + ((__p) << 2)) #else #define GR_CHECK_FIFO_PTR() @@ -335,7 +341,7 @@ if (gc->cmdTransportInfo.autoBump) {\ GDBG_ERROR("GR_ASSERT_SIZE","byte counter should be %d but is %d\n", \ gc->expected_counter,gc->counter); \ GR_CHECK_FIFO_PTR(); \ - gc->checkPtr = (FxU32)gc->cmdTransportInfo.fifoPtr; \ + gc->checkPtr = (AnyPtr)gc->cmdTransportInfo.fifoPtr; \ gc->checkCounter = 0; \ ASSERT(gc->counter == gc->expected_counter); \ gc->counter = gc->expected_counter = 0 @@ -371,12 +377,17 @@ if (gc->cmdTransportInfo.autoBump) {\ #if USE_PACKET_FIFO #if GLIDE_DEBUG +#if defined(__alpha__) || defined(__LP64__) +#define DEBUGFIFOWRITE(a,b,c) +#define DEBUGFIFOFWRITE(a,b,c) +#else void _grFifoWriteDebug(FxU32 addr, FxU32 val, FxU32 fifoPtr); #define DEBUGFIFOWRITE(a,b,c) \ _grFifoWriteDebug((FxU32) a, (FxU32) b, (FxU32) c) void _grFifoFWriteDebug(FxU32 addr, float val, FxU32 fifoPtr); #define DEBUGFIFOFWRITE(a,b,c) \ _grFifoFWriteDebug((FxU32) a, (float) b, (FxU32) c) +#endif extern void _reg_group_begin_internal_wax( FxU32 regBase, FxU32 groupNum, @@ -756,7 +767,7 @@ do { \ GDBG_INFO(120, "REG_GROUP_SET:\n"); \ } \ GDBG_INFO(120, "\tFile: %s Line %d\n", __FILE__, __LINE__); \ - GDBG_INFO(120, "\tfifoPtr: 0x%x, Val: 0x%x\n", (FxU32) _regGroupFifoPtr - (FxU32)gc->rawLfb, __val);\ + GDBG_INFO(120, "\tfifoPtr: 0x%x, Val: 0x%x\n", (AnyPtr) _regGroupFifoPtr - (AnyPtr)gc->rawLfb, __val);\ SET_FIFO(*_regGroupFifoPtr++, (__val)); \ GR_INC_SIZE(sizeof(FxU32)); \ } while(0) @@ -777,7 +788,7 @@ do { \ GDBG_INFO(120, "REG_GROUP_SET:\n"); \ } \ GDBG_INFO(120, "\tFile: %s Line %d\n", __FILE__, __LINE__); \ - GDBG_INFO(120, "\tfifoPtr: 0x%x, Val: 0x%x\n", (FxU32) _regGroupFifoPtr - (FxU32)gc->rawLfb, __val);\ + GDBG_INFO(120, "\tfifoPtr: 0x%x, Val: 0x%x\n", (AnyPtr) _regGroupFifoPtr - (AnyPtr)gc->rawLfb, __val);\ SET_FIFO(*_regGroupFifoPtr++, (__val)); \ GR_INC_SIZE(sizeof(FxU32)); \ } while(0) @@ -793,7 +804,7 @@ do { \ } \ GDBG_INFO(220, "REG_GROUP_SET_WAX:\n");\ GDBG_INFO(220, "\tFile: %s Line %d\n", __FILE__, __LINE__);\ - GDBG_INFO(220, "\tfifoPtr: 0x%x, Val: 0x%x\n", (FxU32) _regGroupFifoPtr - (FxU32)gc->rawLfb, __val);\ + GDBG_INFO(220, "\tfifoPtr: 0x%x, Val: 0x%x\n", (AnyPtr) _regGroupFifoPtr - (AnyPtr)gc->rawLfb, __val);\ SET_FIFO(*_regGroupFifoPtr++, (__val)); \ GR_INC_SIZE(sizeof(FxU32)); \ } while(0) @@ -823,8 +834,8 @@ do { \ #define REG_GROUP_END() \ ASSERT(_checkP); \ - ASSERT((((FxU32)_regGroupFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) >> 2) == _groupNum + 1); \ - gc->cmdTransportInfo.fifoRoom -= ((FxU32)_regGroupFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \ + ASSERT((((AnyPtr)_regGroupFifoPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr) >> 2) == _groupNum + 1); \ + gc->cmdTransportInfo.fifoRoom -= ((AnyPtr)_regGroupFifoPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr); \ gc->cmdTransportInfo.fifoPtr = (FxU32*)_regGroupFifoPtr; \ GDBG_INFO(gc->myLevel + 200, "\tGroupEnd: (0x%X : 0x%X)\n", \ gc->cmdTransportInfo.fifoPtr, gc->cmdTransportInfo.fifoRoom); \ @@ -837,7 +848,7 @@ do { \ if (gc->contextP) { \ FxU32* curFifoPtr = gc->cmdTransportInfo.fifoPtr; \ FXUNUSED(__base); \ - GR_ASSERT(((FxU32)(curFifoPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ + GR_ASSERT(((AnyPtr)(curFifoPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ GR_CHECK_COMPATABILITY(FN_NAME, \ !gc->open, \ "Called before grSstWinOpen()"); \ @@ -880,7 +891,7 @@ do { \ if (gc->contextP) { \ FxU32* curFifoPtr = gc->cmdTransportInfo.fifoPtr; \ FXUNUSED(__base); \ - GR_ASSERT(((FxU32)(curFifoPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ + GR_ASSERT(((AnyPtr)(curFifoPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ GR_CHECK_COMPATABILITY(FN_NAME, \ !gc->open, \ "Called before grSstWinOpen()"); \ @@ -1036,10 +1047,10 @@ _grH3FifoDump_Linear(const FxU32* const linearPacketAddr); GR_CHECK_COMPATABILITY(FN_NAME, \ !gc->open, \ "Called before grSstWinOpen()"); \ - GR_ASSERT(((FxU32)(tPackPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ + GR_ASSERT(((AnyPtr)(tPackPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ GR_ASSERT((((__nVerts) * (__vertSize)) + sizeof(FxU32)) <= (FxU32)gc->cmdTransportInfo.fifoRoom); \ - GR_ASSERT((((FxU32)tPackPtr) + ((__nVerts) * (__vertSize)) + sizeof(FxU32)) < \ - (FxU32)gc->cmdTransportInfo.fifoEnd); \ + GR_ASSERT((((AnyPtr)tPackPtr) + ((__nVerts) * (__vertSize)) + sizeof(FxU32)) < \ + (AnyPtr)gc->cmdTransportInfo.fifoEnd); \ GR_ASSERT(nVertex < 0x10); \ GR_ASSERT(nVertex > 0x00); \ GR_ASSERT(((__packetHdr) & 0xE0000000UL) == 0x00UL); \ @@ -1050,27 +1061,27 @@ _grH3FifoDump_Linear(const FxU32* const linearPacketAddr); pCount++; \ GDBG_INFO(gc->myLevel + 200, "\t(0x%X) : V#: 0x%X - P#: 0x%X - ParamVal: (%f : 0x%X)\n", \ (FxU32)tPackPtr, \ - ((FxU32)tPackPtr - ((FxU32)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) / sVertex, \ - (((FxU32)tPackPtr - ((FxU32)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) % sVertex) >> 2, \ + ((AnyPtr)tPackPtr - ((AnyPtr)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) / sVertex, \ + (((AnyPtr)tPackPtr - ((AnyPtr)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) % sVertex) >> 2, \ (((__val) < 786432.875) ? (__val) : ((__val) - 786432.875)), \ (__floatVal)) #define SETF_DUMP(__val) \ pCount++; \ GDBG_INFO(gc->myLevel + 200, "\t(0x%X) : V#: 0x%X - P#: 0x%X - ParamVal: %f\n", \ (FxU32)tPackPtr, \ - ((FxU32)tPackPtr - ((FxU32)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) / sVertex, \ - (((FxU32)tPackPtr - ((FxU32)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) % sVertex) >> 2, \ + ((AnyPtr)tPackPtr - ((AnyPtr)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) / sVertex, \ + (((AnyPtr)tPackPtr - ((AnyPtr)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) % sVertex) >> 2, \ (((__val) < 786432.875) ? (__val) : ((__val) - 786432.875))) #define SET_DUMP(__val) \ pCount++; \ GDBG_INFO(gc->myLevel + 200, "\t(0x%X) : V#: 0x%X - P#: 0x%X - ParamVal: 0x%X\n", \ (FxU32)tPackPtr, \ - ((FxU32)tPackPtr - ((FxU32)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) / sVertex, \ - (((FxU32)tPackPtr - ((FxU32)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) % sVertex) >> 2, \ + ((AnyPtr)tPackPtr - ((AnyPtr)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) / sVertex, \ + (((AnyPtr)tPackPtr - ((AnyPtr)gc->cmdTransportInfo.fifoPtr + sizeof(FxU32))) % sVertex) >> 2, \ (__val)) #define TRI_ASSERT() \ GR_ASSERT(pCount == (nVertex * (sVertex >> 2))); \ - ASSERT(((FxU32)tPackPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) == (nVertex * sVertex) + sizeof(FxU32)) + ASSERT(((AnyPtr)tPackPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr) == (nVertex * sVertex) + sizeof(FxU32)) #else /* !GDBG_INFO_ON */ #define DEBUGFIFODUMP_TRI(__packetAddr) #define DEBUGFIFODUMP_LINEAR(__packetAddr) @@ -1135,7 +1146,7 @@ do { \ #define TRI_END \ TRI_ASSERT(); \ - gc->cmdTransportInfo.fifoRoom -= ((FxU32)tPackPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \ + gc->cmdTransportInfo.fifoRoom -= ((AnyPtr)tPackPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr); \ gc->cmdTransportInfo.fifoPtr = tPackPtr; \ GDBG_INFO(gc->myLevel + 200, "\tTriEnd: (0x%X : 0x%X)\n", tPackPtr, gc->cmdTransportInfo.fifoRoom); \ FIFO_ASSERT(); \ @@ -1154,12 +1165,12 @@ do { \ GR_CHECK_COMPATABILITY(FN_NAME, \ !gc->open, \ "Called before grSstWinOpen()"); \ - GR_ASSERT(((FxU32)(packetPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ + GR_ASSERT(((AnyPtr)(packetPtr) & FIFO_ALIGN_MASK) == 0); /* alignment */ \ GR_ASSERT((__numWords) > 0); /* packet size */ \ GR_ASSERT((__numWords) < ((0x01 << 19) - 2)); \ GR_ASSERT((((FxU32)(__numWords) + 2) << 2) <= (FxU32)gc->cmdTransportInfo.fifoRoom); \ - GR_ASSERT(((FxU32)packetPtr + (((__numWords) + 2) << 2)) < \ - (FxU32)gc->cmdTransportInfo.fifoEnd); \ + GR_ASSERT(((AnyPtr)packetPtr + (((__numWords) + 2) << 2)) < \ + (AnyPtr)gc->cmdTransportInfo.fifoEnd); \ GR_ASSERT((hdr2 & 0xE0000000UL) == 0x00UL); \ GR_ASSERT(((__addr) & 0x03UL) == 0x00UL); \ FIFO_ASSERT(); \ @@ -1204,8 +1215,8 @@ do { \ #define FIFO_LINEAR_WRITE_END \ DEBUGFIFODUMP_LINEAR(gc->cmdTransportInfo.fifoPtr); \ - GR_ASSERT((((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr) >> 2) == __writeSize + 2); \ - gc->cmdTransportInfo.fifoRoom -= ((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \ + GR_ASSERT((((AnyPtr)packetPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr) >> 2) == __writeSize + 2); \ + gc->cmdTransportInfo.fifoRoom -= ((AnyPtr)packetPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr); \ gc->cmdTransportInfo.fifoPtr = packetPtr; \ GDBG_INFO(gc->myLevel + 200, "\tLinearEnd: (0x%X : 0x%X)\n", \ packetPtr, gc->cmdTransportInfo.fifoRoom); \ @@ -1623,7 +1634,7 @@ GR_CHECK_SIZE() } \ else { \ FxU32 argb; \ - argb = *((FxU32 *)((int)_s + i)) & 0x00ffffff; \ + argb = *((FxU32 *)((long)_s + i)) & 0x00ffffff; \ TRI_SETF(*((float *)&argb)); \ dataElem++; \ i = gc->tsuDataList[dataElem]; \ diff --git a/glide3x/h5/glide3/src/fxglide.h b/glide3x/h5/glide3/src/fxglide.h index 16b3688..6b6c1b2 100644 --- a/glide3x/h5/glide3/src/fxglide.h +++ b/glide3x/h5/glide3/src/fxglide.h @@ -1273,7 +1273,7 @@ typedef struct { * the _archXXXX proc list that is selected at grGlideInit time. */ -#ifndef __linux__ +#if !defined(__linux__) || defined(GLIDE_USE_C_TRISETUP) typedef FxI32 (FX_CALL* GrTriSetupProc)(const void *a, const void *b, const void *c); #else /* defined(__linux__) */ typedef FxI32 (FX_CALL* GrTriSetupProc)(const void *g, const void *a, const void *b, const void *c); @@ -1555,7 +1555,7 @@ typedef struct GrGC_s SET_FIFO(*curFifoPtr++, *curPktData++); \ } \ GR_INC_SIZE((__writeCount) * sizeof(FxU32)); \ - gc->cmdTransportInfo.fifoRoom -= ((FxU32)curFifoPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \ + gc->cmdTransportInfo.fifoRoom -= ((AnyPtr)curFifoPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr); \ gc->cmdTransportInfo.fifoPtr = curFifoPtr; \ } \ GR_CHECK_SIZE(); \ @@ -1675,7 +1675,7 @@ typedef struct GrGC_s */ FxU32* fifoPtr; /* Current write pointer into fifo */ - FxU32 fifoRead; /* Last known hw read ptr. + AnyPtr fifoRead; /* Last known hw read ptr. * If on an sli enabled system this will be * the 'closest' hw read ptr of the sli * master and slave. @@ -1747,7 +1747,7 @@ typedef struct GrGC_s occur every 64K writes. */ } cmdTransportInfo; -#ifndef __linux__ +#if !defined(__linux__) || defined(GLIDE_USE_C_TRISETUP) FxI32 (FX_CALL *triSetupProc)(const void *a, const void *b, const void *c); #else /* defined(__linux__) */ FxI32 (FX_CALL *triSetupProc)(const void *g, const void *a, const void *b, const void *c); @@ -1766,17 +1766,19 @@ typedef struct GrGC_s SstCRegs *slaveCRegs[3] ; /* AJB - ptrs to slave chips cmd regs */ FxU32 - *rawLfb, + *rawLfb; + FxU32 nBuffers, curBuffer, frontBuffer, - backBuffer, + backBuffer; + AnyPtr buffers0[4], buffers1[4], lfbBuffers[4]; /* Tile relative addresses of the color/aux * buffers for lfbReads. */ - FxU32 lockPtrs[2]; /* pointers to locked buffers */ + AnyPtr lockPtrs[2]; /* pointers to locked buffers */ FxU32 fbStride; FxBool colTiled, // AJB - grBufferClear needs to know when target surfaces @@ -1856,7 +1858,7 @@ typedef struct GrGC_s FxI32 expected_counter; /* the number of bytes expected to be sent */ FxU32 checkCounter; - FxU32 checkPtr; + AnyPtr checkPtr; FxVideoTimingInfo* vidTimings;/* init code overrides */ @@ -2085,6 +2087,11 @@ extern GrGCFuncs _curGCFuncs; * This is the __linux__ code. */ #define P6FENCE asm("xchg %%eax, %0" : : "m" (_GlideRoot.p6Fencer) : "eax"); +#elif defined(__GNUC__) && defined(__alpha__) +/* This might need to be a memory barrier on alpha - we'll see */ +#define P6FENCE +#elif defined(__GNUC__) && defined(__ia64__) +#define P6FENCE asm volatile("mf.a" ::: "memory") #else /* !defined ( P6FENCE ) */ # error "P6 Fencing code needs to be added for this compiler" #endif /* !defined ( P6FENCE ) */ @@ -2243,7 +2250,11 @@ _trisetup_noclip_valid(const void *va, const void *vb, const void *vc ); #define TRISETUP(_a, _b, _c) \ ((FxI32 (*)(const void *va, const void *vb, const void *vc, GrGC *gc))*gc->triSetupProc)(_a, _b, _c, gc) #elif defined(__linux__) +#ifdef GLIDE_USE_C_TRISETUP +#define TRISETUP(a, b, c) (gc->triSetupProc)(a, b, c) +#else #define TRISETUP(a, b, c) (gc->triSetupProc)(gc, a, b, c) +#endif #else /* defined(__linux__) */ #define TRISETUP \ (*gc->triSetupProc) @@ -2589,15 +2600,15 @@ getThreadValueFast() { #endif #if (GLIDE_PLATFORM & GLIDE_OS_MACOS) -extern FxU32 _threadValueMacOS; -__inline FxU32 +extern AnyPtr _threadValueMacOS; +__inline AnyPtr getThreadValueFast() { return _threadValueMacOS; } #endif #ifdef __linux__ -extern FxU32 threadValueLinux; +extern AnyPtr threadValueLinux; #define getThreadValueFast() threadValueLinux #endif /* defined(__linux__) */ @@ -2620,9 +2631,9 @@ void freeThreadStorage( void ); void -setThreadValue( FxU32 value ); +setThreadValue( AnyPtr value ); -FxU32 +AnyPtr getThreadValueSLOW( void ); void @@ -2860,7 +2871,7 @@ assertDefaultState( void ); saveLevel = gc->myLevel; \ myName = name; \ gc->myLevel = level; \ - gc->checkPtr = (FxU32)gc->cmdTransportInfo.fifoPtr; \ + gc->checkPtr = (AnyPtr)gc->cmdTransportInfo.fifoPtr; \ GDBG_INFO(gc->myLevel,myName); \ FXUNUSED(saveLevel); \ FXUNUSED(hw); \ @@ -2871,7 +2882,7 @@ assertDefaultState( void ); const char* myName = name; \ GR_ASSERT(gc != NULL); \ gc->myLevel = level; \ - gc->checkPtr = (FxU32)gc->cmdTransportInfo.fifoPtr; \ + gc->checkPtr = (AnyPtr)gc->cmdTransportInfo.fifoPtr; \ GDBG_INFO(gc->myLevel,myName); \ FXUNUSED(saveLevel); \ FXUNUSED(hw); \ @@ -3034,7 +3045,7 @@ extern FxU32 SST_TEXTURE_ALIGN; #define HW_TEX_PTR(__b) ((FxU32*)(((FxU32)(__b)) + HW_TEXTURE_OFFSET)) /* access a floating point array with a byte index */ -#define FARRAY(p,i) (*(float *)((i)+(int)(p))) +#define FARRAY(p,i) (*(float *)((i)+(long)(p))) #define ArraySize(__a) (sizeof(__a) / sizeof((__a)[0])) #if GDBG_INFO_ON diff --git a/glide3x/h5/glide3/src/gaa.c b/glide3x/h5/glide3/src/gaa.c index 4f8e1d7..c1820f3 100644 --- a/glide3x/h5/glide3/src/gaa.c +++ b/glide3x/h5/glide3/src/gaa.c @@ -386,8 +386,8 @@ aaVpDrawArrayEdgeSense(float *a, float *b, float *c, float oowa, float oowb) } else { ia = gc->state.vData.pargbInfo.offset; - *((FxU32 *)&v1a)=*((FxU32 *)((int)a + ia))&0x00ffffff; - *((FxU32 *)&v2a)=*((FxU32 *)((int)b + ia))&0x00ffffff; + *((FxU32 *)&v1a)=*((FxU32 *)((long)a + ia))&0x00ffffff; + *((FxU32 *)&v2a)=*((FxU32 *)((long)b + ia))&0x00ffffff; } { @@ -688,7 +688,7 @@ _grAADrawPoints(FxI32 mode, FxI32 count, void *pointers) FxU32 argb; if (i == ia) { - argb = *((FxU32 *)((int)e + i)) & 0x00ffffff; + argb = *((FxU32 *)((long)e + i)) & 0x00ffffff; TRI_SETF(*((float *)&argb)); } else { @@ -867,8 +867,8 @@ _grAADrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) ady = -ady; if (gc->state.vData.colorType != GR_FLOAT) { - *((FxU32 *)&v1a)=*((FxU32 *)((int)v1 + ia))&0x00ffffff; - *((FxU32 *)&v2a)=*((FxU32 *)((int)v2 + ia))&0x00ffffff; + *((FxU32 *)&v1a)=*((FxU32 *)((long)v1 + ia))&0x00ffffff; + *((FxU32 *)&v2a)=*((FxU32 *)((long)v2 + ia))&0x00ffffff; } if (adx >= ady) { /* X major line */ @@ -1074,8 +1074,8 @@ _grAADrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) ady = -ady; /* if (gc->state.vData.colorType != GR_FLOAT) { - *((FxU32 *)&v1a)=*((FxU32 *)((int)v1 + ia))&0x00ffffff; - *((FxU32 *)&v2a)=*((FxU32 *)((int)v2 + ia))&0x00ffffff; + *((FxU32 *)&v1a)=*((FxU32 *)((long)v1 + ia))&0x00ffffff; + *((FxU32 *)&v2a)=*((FxU32 *)((long)v2 + ia))&0x00ffffff; } */ @@ -1268,8 +1268,8 @@ aaDrawArrayEdgeSense(float *a, float *b, float *c) } else { ia = gc->state.vData.pargbInfo.offset; - *((FxU32 *)&v1a)=*((FxU32 *)((int)a + ia))&0x00ffffff; - *((FxU32 *)&v2a)=*((FxU32 *)((int)b + ia))&0x00ffffff; + *((FxU32 *)&v1a)=*((FxU32 *)((long)a + ia))&0x00ffffff; + *((FxU32 *)&v2a)=*((FxU32 *)((long)b + ia))&0x00ffffff; } { diff --git a/glide3x/h5/glide3/src/gdraw.c b/glide3x/h5/glide3/src/gdraw.c index 4f3a729..b8b5abb 100644 --- a/glide3x/h5/glide3/src/gdraw.c +++ b/glide3x/h5/glide3/src/gdraw.c @@ -219,7 +219,7 @@ #define OUTBOUNDS(a) (OUTBOUNDSX(a) || OUTBOUNDSY(a)) /* access an array of four-byte opaque datums with a byte index */ -#define ARRAY(p,i) (*(int *)((i)+(int)(p))) +#define ARRAY(p,i) (*(int *)((i)+(long)(p))) /*--------------------------------------------------------------------------- ** grDrawPoint @@ -278,10 +278,13 @@ GR_ENTRY(grDrawLine, void, (const void *a, const void *b)) } #else #ifdef __linux__ - if (gc->state.grEnableArgs.primitive_smooth_mode & GR_AA_ORDERED_LINES_MASK) - _grAADrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, (void *)&a); - else - _grDrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, (void *)&a); + { + const void *verts[2] = { a,b }; + if (gc->state.grEnableArgs.primitive_smooth_mode & GR_AA_ORDERED_LINES_MASK) + _grAADrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, verts); + else + _grDrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, verts); + } #else /* defined(__linux__) */ if (gc->state.grEnableArgs.primitive_smooth_mode & GR_AA_ORDERED_LINES_MASK) _grAADrawLineStrip(GR_VTX_PTR_ARRAY, GR_LINES, 2, &(void *)a); @@ -323,7 +326,7 @@ GR_ENTRY(grDrawTriangle, void, (const void *a, const void *b, const void *c)) /* HackAlert: Nuke the fifo ptr checking stuff here if we're just * debugging the asm tri code. */ - gc->checkPtr = (FxU32)gc->cmdTransportInfo.fifoPtr; + gc->checkPtr = (AnyPtr)gc->cmdTransportInfo.fifoPtr; gc->checkCounter = 0; #else /* GLIDE_DEBUG */ GR_END(); @@ -384,7 +387,7 @@ GR_ENTRY(grDrawTriangle, void, (const void *a, const void *b, const void *c)) GR_INC_SIZE(sizeof(FxU32)) #define DA_END \ - gc->cmdTransportInfo.fifoRoom -= ((FxU32)packetPtr - (FxU32)gc->cmdTransportInfo.fifoPtr); \ + gc->cmdTransportInfo.fifoRoom -= ((AnyPtr)packetPtr - (AnyPtr)gc->cmdTransportInfo.fifoPtr); \ gc->cmdTransportInfo.fifoPtr = packetPtr; \ FIFO_ASSERT(); \ } @@ -459,10 +462,14 @@ _grDrawPoints(FxI32 mode, FxI32 count, void *pointers) DA_BEGIN; for (k = 0; k < vcount; k++) { - vPtr = pointers; - if (mode) vPtr = *(float **)vPtr; - - (float *)pointers += stride; + if (mode) { + vPtr = *(float **)pointers; + (float **)pointers += stride; + } + else { + vPtr = (float *)pointers; + (float *)pointers += stride; + } GDBG_INFO_MORE(gc->myLevel, "(%f %f)\n", FARRAY(vPtr,gc->state.vData.vertexInfo.offset), @@ -541,10 +548,14 @@ _grDrawPoints(FxI32 mode, FxI32 count, void *pointers) DA_BEGIN; for (k = 0; k < vcount; k++) { - vPtr = pointers; - if (mode) vPtr = *(float **)vPtr; - - (float *)pointers += stride; + if (mode) { + vPtr = *(float **)pointers; + (float **)pointers += stride; + } + else { + vPtr = (float *)pointers; + (float *)pointers += stride; + } GDBG_INFO_MORE(gc->myLevel, "(%f %f)\n", FARRAY(vPtr,gc->state.vData.vertexInfo.offset), @@ -636,11 +647,15 @@ _grDrawPoints(FxI32 mode, FxI32 count, void *pointers) for (k = 0; k < vcount; k++) { - vPtr = pointers; - if (mode) - vPtr = *(float **)vPtr; + if (mode) { + vPtr = *(float **)pointers; + (float **)pointers += stride; + } + else { + vPtr = (float *)pointers; + (float *)pointers += stride; + } oow = 1.0f / FARRAY(vPtr, gc->state.vData.wInfo.offset); - (float *)pointers += stride; { FxU32 x, y; @@ -755,32 +770,40 @@ _grDrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) FxI32 vcount = sCount >= LINES_BUFFER ? LINES_BUFFER : sCount; GR_SET_EXPECTED_SIZE((gc->state.vData.vSize << 2) * vcount, vcount); + DA_BEGIN; for (k = 0; k < vcount; k++) { - float *a = (float *)pointers; - float *b = (float *)pointers + stride; + float *a; + float *b; if (mode) { - a = *(float **)a; - b = *(float **)b; + a = *(float **)pointers; + b = *((float **)pointers + stride); + (float **)pointers += stride; + if (ltype == GR_LINES) + (float **)pointers += stride; } - (float *)pointers += stride; - if (ltype == GR_LINES) + else { + a = (float *)pointers; + b = ((float *)pointers + stride); (float *)pointers += stride; + if (ltype == GR_LINES) + (float *)pointers += stride; + } /* ** compute absolute deltas and draw from low Y to high Y */ ADY = FARRAY(b, gc->state.vData.vertexInfo.offset+4) - FARRAY(a, gc->state.vData.vertexInfo.offset+4); - i = *(long *)&ADY; + i = *(int *)&ADY; if (i < 0) { float *tv; tv = a; a = b; b = tv; i ^= 0x80000000; /* ady = -ady; */ - (*(long *)&ADY) = i; + (*(int *)&ADY) = i; } DX = FARRAY(b, gc->state.vData.vertexInfo.offset) - FARRAY(a, gc->state.vData.vertexInfo.offset); - j = *(long *)&DX; + j = *(int *)&DX; if (j < 0) { j ^= 0x80000000; /* adx = -adx; */ } @@ -919,26 +942,35 @@ _grDrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) } for (k = 0; k < vcount; k++) { if (ltype == GR_LINES) { - a = (float *)pointers; - b = (float *)pointers + stride; if (mode) { - a = *(float **)a; - b = *(float **)b; + a = *(float **)pointers; + b = *((float **)pointers + stride); + (float **)pointers += stride; + } + else { + a = (float *)pointers; + b = ((float *)pointers + stride); + (float *)pointers += stride; } - (float *)pointers += stride; owa = oowa = 1.0f / FARRAY(a, gc->state.vData.wInfo.offset); owb = oowb = 1.0f / FARRAY(b, gc->state.vData.wInfo.offset); - (float *)pointers += stride; + if (mode) + (float **)pointers += stride; + else + (float *)pointers += stride; } else { owa = oowa = oowb; - a = (float *)pointers; - b = (float *)pointers + stride; if (mode) { - a = *(float **)a; - b = *(float **)b; + a = *(float **)pointers; + b = *((float **)pointers + stride); + (float **)pointers += stride; + } + else { + a = (float *)pointers; + b = (float *)pointers + stride; + (float *)pointers += stride; } - (float *)pointers += stride; owb = oowb = 1.0f / FARRAY(b, gc->state.vData.wInfo.offset); } fay = tmp1 = FARRAY(a, gc->state.vData.vertexInfo.offset+4) @@ -950,7 +982,7 @@ _grDrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) ** compute absolute deltas and draw from low Y to high Y */ ADY = tmp2 - tmp1; - i = *(long *)&ADY; + i = *(int *)&ADY; if (i < 0) { float *tv; owa = oowb; owb = oowa; @@ -958,7 +990,7 @@ _grDrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) fby = tmp1; tv = a; a = b; b = tv; i ^= 0x80000000; /* ady = -ady; */ - (*(long *)&ADY) = i; + (*(int *)&ADY) = i; } fax = FARRAY(a, gc->state.vData.vertexInfo.offset) *owa*gc->state.Viewport.hwidth+gc->state.Viewport.ox; @@ -966,7 +998,7 @@ _grDrawLineStrip(FxI32 mode, FxI32 ltype, FxI32 count, void *pointers) *owb*gc->state.Viewport.hwidth+gc->state.Viewport.ox; DX = fbx - fax; - j = *(long *)&DX; + j = *(int *)&DX; if (j < 0) { j ^= 0x80000000; /* adx = -adx; */ } @@ -1082,10 +1114,14 @@ _grDrawTriangles_Default(FxI32 mode, FxI32 count, void *pointers) FxI32 i; FxU32 dataElem = 0; - vPtr = pointers; - if (mode) - vPtr = *(float **)vPtr; - (float *)pointers += stride; + if (mode) { + vPtr = *(float **)pointers; + (float **)pointers += stride; + } + else { + vPtr = (float *)pointers; + (float *)pointers += stride; + } i = gc->tsuDataList[dataElem]; @@ -1115,9 +1151,12 @@ _grDrawTriangles_Default(FxI32 mode, FxI32 count, void *pointers) TRI_STRIP_BEGIN(kSetupStrip, vcount, gc->state.vData.vSize, SSTCP_PKT3_BDDBDD); for (k = 0; k < vcount; k++) { - vPtr = pointers; - if (mode) + if (mode) { vPtr = *(float **)pointers; + } + else { + vPtr = (float *)pointers; + } oow = 1.0f / FARRAY(vPtr, gc->state.vData.wInfo.offset); /* x, y */ @@ -1125,7 +1164,10 @@ _grDrawTriangles_Default(FxI32 mode, FxI32 count, void *pointers) *oow*gc->state.Viewport.hwidth + gc->state.Viewport.ox); TRI_SETF(FARRAY(vPtr, 4) *oow*gc->state.Viewport.hheight + gc->state.Viewport.oy); - (float *)pointers += stride; + if (mode) + (float **)pointers += stride; + else + (float *)pointers += stride; TRI_VP_SETFS(vPtr,oow); } diff --git a/glide3x/h5/glide3/src/gerror.c b/glide3x/h5/glide3/src/gerror.c index 81574d0..ea749a4 100644 --- a/glide3x/h5/glide3/src/gerror.c +++ b/glide3x/h5/glide3/src/gerror.c @@ -291,7 +291,7 @@ _grAssert(char *exp, char *fileName, int lineNo) gdbg_printf("Command Fifo:\n"); gdbg_printf("\tSoftware:\n"); - gdbg_printf("\t\tfifoPtr: 0x%X\n", (FxU32)gc->cmdTransportInfo.fifoPtr - (FxU32) gc->rawLfb); + gdbg_printf("\t\tfifoPtr: 0x%X\n", (AnyPtr)gc->cmdTransportInfo.fifoPtr - (AnyPtr) gc->rawLfb); gdbg_printf("\t\tfifoOffset: 0x%X\n", gc->cmdTransportInfo.fifoOffset); gdbg_printf("\t\tfifoEnd: 0x%X\n", gc->cmdTransportInfo.fifoEnd - gc->rawLfb); gdbg_printf("\t\tfifoSize: 0x%X\n", gc->cmdTransportInfo.fifoSize); @@ -301,7 +301,7 @@ _grAssert(char *exp, char *fileName, int lineNo) if ( !gc->windowed ) { gdbg_printf("\tHardware:\n"); - gdbg_printf("\t\treadPtrL: 0x%X\n", HW_FIFO_PTR(FXTRUE) - (FxU32)gc->rawLfb); + gdbg_printf("\t\treadPtrL: 0x%X\n", HW_FIFO_PTR(FXTRUE) - (AnyPtr)gc->rawLfb); gdbg_printf("\t\tdepth: 0x%X\n", GR_CAGP_GET(depth)); gdbg_printf("\t\tholeCount: 0x%X\n", GR_CAGP_GET(holeCount)); gdbg_printf("\t\tbaseAddrL: 0x%X\n", GR_CAGP_GET(baseAddrL)); diff --git a/glide3x/h5/glide3/src/gglide.c b/glide3x/h5/glide3/src/gglide.c index 592662f..0495f49 100644 --- a/glide3x/h5/glide3/src/gglide.c +++ b/glide3x/h5/glide3/src/gglide.c @@ -1297,7 +1297,7 @@ _grTriFill(GrColor_t color, FxU32 depth, GrStencil_t stencil) { REG_GROUP_SET(hw, stencilMode, (GR_CMP_ALWAYS << SST_STENCIL_FUNC_SHIFT) | (stencil << SST_STENCIL_REF_SHIFT) | - stencilMode & (SST_STENCIL_WMASK | SST_STENCIL_MASK) | + (stencilMode & (SST_STENCIL_WMASK | SST_STENCIL_MASK)) | SST_STENCIL_ENABLE) ; REG_GROUP_SET(hw, stencilOp, (GR_STENCILOP_REPLACE << SST_STENCIL_SFAIL_OP_SHIFT) | (GR_STENCILOP_REPLACE << SST_STENCIL_ZFAIL_OP_SHIFT) | @@ -2803,8 +2803,8 @@ GR_ENTRY(grDRIBufferSwap, void, (FxU32 swapInterval)) for ( i = 0; i < MAX_BUFF_PENDING && j == -1; i++) { if (gc->bufferSwaps[i] == 0xffffffff) { gc->bufferSwaps[i] = - (FxU32) gc->cmdTransportInfo.fifoPtr - - (FxU32) gc->cmdTransportInfo.fifoStart; + (AnyPtr) gc->cmdTransportInfo.fifoPtr - + (AnyPtr) gc->cmdTransportInfo.fifoStart; j = i; } } @@ -3860,7 +3860,7 @@ GR_ENTRY(grGlideShutdown, void, (void)) * continuing so that any internal glide calls have a valid * gc from tls via GR_DCL_GC. F*ck this up at your own peril. */ - setThreadValue((FxU32)gc); + setThreadValue((AnyPtr)gc); #if (GLIDE_PLATFORM & GLIDE_OS_WIN32) /* Flush any remaining commands and cleanup any per gc state */ grSurfaceReleaseContext((GrContext_t)gc); diff --git a/glide3x/h5/glide3/src/glfb.c b/glide3x/h5/glide3/src/glfb.c index 2dbfc47..038b3f5 100644 --- a/glide3x/h5/glide3/src/glfb.c +++ b/glide3x/h5/glide3/src/glfb.c @@ -658,7 +658,7 @@ GR_ENTRY(grLfbLock, FxBool,(GrLock_t type, GrBuffer_t buffer, if ( gc->textureBuffer.on && ( buffer == GR_BUFFER_TEXTUREBUFFER_EXT || buffer == GR_BUFFER_TEXTUREAUXBUFFER_EXT )) { if (type == GR_LFB_READ_ONLY) { - info->lfbPtr = (void *)((FxU32)gc->rawLfb + gc->textureBuffer.addr); + info->lfbPtr = (void *)((AnyPtr)gc->rawLfb + gc->textureBuffer.addr); info->strideInBytes = gc->textureBuffer.stride ; #if __POWERPC__ if(IS_NAPALM(gc->bInfo->pciInfo.deviceID)) { @@ -680,11 +680,11 @@ GR_ENTRY(grLfbLock, FxBool,(GrLock_t type, GrBuffer_t buffer, (!pixelPipeline) && /* Origin must be upper left since we will return raw lfb */ (origin != GR_ORIGIN_LOWER_LEFT)){ - info->lfbPtr = (void *)((FxU32)gc->rawLfb + gc->textureBuffer.addr); + info->lfbPtr = (void *)((AnyPtr)gc->rawLfb + gc->textureBuffer.addr); info->strideInBytes = gc->textureBuffer.stride ; } -#endif +#endif else { #ifdef __linux__ /* @@ -1117,7 +1117,7 @@ _grLfbWriteRegion(FxBool pixPipelineP, case GR_LFB_SRC_FMT_ZA16: dstData = (FxU32*)(((FxU16*)dstData) + dst_x); length = src_width * 2; - aligned = !((int)dstData&0x2); + aligned = !((long)dstData&0x2); srcJump = src_stride - length; dstJump = info.strideInBytes - length; if (aligned) { @@ -1322,7 +1322,7 @@ GR_ENTRY(grLfbReadRegion, FxBool, (GrBuffer_t src_buffer, length = src_width * 2; dstJump = dst_stride - length; srcJump = info.strideInBytes - length; - aligned = !((int)srcData&0x2); + aligned = !((long)srcData&0x2); odd = (src_y+src_height) & 0x1; #if __POWERPC__ diff --git a/glide3x/h5/glide3/src/glide.h b/glide3x/h5/glide3/src/glide.h index bf97422..11c3d75 100644 --- a/glide3x/h5/glide3/src/glide.h +++ b/glide3x/h5/glide3/src/glide.h @@ -53,7 +53,7 @@ typedef FxU32 GrColor_t; typedef FxU8 GrAlpha_t; typedef FxU32 GrMipMapId_t; typedef FxU8 GrFog_t; -typedef FxU32 GrContext_t; +typedef AnyPtr GrContext_t; typedef int (FX_CALL *GrProc)(); /* diff --git a/glide3x/h5/glide3/src/gpci.c b/glide3x/h5/glide3/src/gpci.c index 320f067..d5b46b0 100644 --- a/glide3x/h5/glide3/src/gpci.c +++ b/glide3x/h5/glide3/src/gpci.c @@ -546,7 +546,7 @@ static GrTriSetupProc _triSetupProcs[][2][2][2] = { /* Window coords */ { - { _trisetup_Default_win_nocull_valid, _trisetup_Default_win_cull_valid }, + { _trisetup_Default_win_nocull_valid, _trisetup_Default_win_cull_valid }, { _trisetup_Default_win_nocull_invalid, _trisetup_Default_win_cull_invalid }, }, @@ -561,8 +561,8 @@ static GrTriSetupProc _triSetupProcs[][2][2][2] = { /* Window coords */ { - { _trisetup_3DNow_win_nocull_valid, _trisetup_3DNow_win_cull_valid }, - { _trisetup_3DNow_win_nocull_invalid, _trisetup_3DNow_win_cull_invalid }, + { _trisetup_3DNow_win_nocull_valid, _trisetup_3DNow_win_cull_valid }, + { _trisetup_3DNow_win_nocull_invalid, _trisetup_3DNow_win_cull_invalid }, }, /* Clip coordinates */ { @@ -575,14 +575,14 @@ static GrTriSetupProc _triSetupProcs[][2][2][2] = { /* Window coords */ { - { _trisetup_null, _trisetup_null }, - { _trisetup_null, _trisetup_null }, + { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null }, + { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null }, }, /* Clip coordinates */ { - { _trisetup_null, _trisetup_null }, - { _trisetup_null, _trisetup_null }, + { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null }, + { (GrTriSetupProc) _trisetup_null, (GrTriSetupProc) _trisetup_null }, }, }, }; @@ -591,7 +591,7 @@ static GrTriSetupProc _triSetupProcs[][2][2][2] = * unset for C_TRISETUP. Currently, teh grDrawTriangle code will only * vector to the asm code if C_TRISETUP is not set. */ -#if GLIDE_USE_C_TRISETUP || __POWERPC__ +#if GLIDE_USE_C_TRISETUP || __alpha__ || __POWERPC__ static GrVertexListProc _vertexListProcs[][2] = { { _grDrawVertexList, _grDrawVertexList }, #if GL_AMD3D @@ -1561,7 +1561,7 @@ DllMain(HANDLE hInst, ULONG ul_reason_for_call, LPVOID lpReserved) GR_DCL_GC; /* If there is no current gc in tls then set the current context. */ - if (gc == NULL) setThreadValue((FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst]); + if (gc == NULL) setThreadValue((AnyPtr)&_GlideRoot.GCs[_GlideRoot.current_sst]); } break; case DLL_THREAD_DETACH: diff --git a/glide3x/h5/glide3/src/gsst.c b/glide3x/h5/glide3/src/gsst.c index f460646..d07f12a 100644 --- a/glide3x/h5/glide3/src/gsst.c +++ b/glide3x/h5/glide3/src/gsst.c @@ -1146,8 +1146,8 @@ initGC ( GrGC *gc ) gc->bufferSwaps[t] = 0xffffffff; } - gc->bufferSwaps[0] = ((FxU32) gc->cmdTransportInfo.fifoPtr - - (FxU32) gc->cmdTransportInfo.fifoStart); + gc->bufferSwaps[0] = ((AnyPtr) gc->cmdTransportInfo.fifoPtr - + (AnyPtr) gc->cmdTransportInfo.fifoStart); gc->swapsPending = 1; @@ -1358,7 +1358,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, * current gc. This gc is valid for all threads in the fullscreen * context. */ - setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] ); + setThreadValue( (AnyPtr)&_GlideRoot.GCs[_GlideRoot.current_sst] ); { /* Partial Argument Validation */ @@ -1542,12 +1542,12 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, for (buffer = 0; buffer < nColBuffers; buffer++) { gc->buffers0[buffer] = bufInfo->colBuffStart0[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; } if (nAuxBuffers != 0) { gc->buffers0[buffer] = bufInfo->auxBuffStart0; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; } vInfo->hWnd = gc->grHwnd; @@ -1660,7 +1660,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, GDBG_INFO(1, "autoBump: 0x%x\n", _GlideRoot.environment.autoBump); /* The logic for this is hosed for PowerPC, where we disable auto-bump even on PCI. */ - if (gc->cmdTransportInfo.autoBump = _GlideRoot.environment.autoBump) { + if ((gc->cmdTransportInfo.autoBump = _GlideRoot.environment.autoBump)!=0) { if (!hwcInitFifo( bInfo, gc->cmdTransportInfo.autoBump)) { hwcRestoreVideo(bInfo); GrErrorCallback(hwcGetErrorString(), FXFALSE); @@ -1700,7 +1700,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, gc->tmu_state[0].total_mem = gc->tramSize; #else /* gc->fbOffset = (FxU32)fxHalFbiGetMemory((SstRegs*)gc->reg_ptr); */ - gc->fbOffset = (FxU32)gc->rawLfb; + gc->fbOffset = (AnyPtr)gc->rawLfb; gc->fbOffset = 0x0; gc->tmuMemInfo[0].tramOffset = 0x200000; gc->tmuMemInfo[0].tramSize = 0x200000; @@ -1793,7 +1793,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, #endif /* defined( GLIDE_INIT_HAL ) */ #else /* !defined( USE_PACKET_FIFO ) */ - gc->fbOffset = (FxU32)gc->rawLfb; + gc->fbOffset = (AnyPtr)gc->rawLfb; gc->fbOffset = 0x0; gc->tmuMemInfo[0].tramOffset = 0x200000; gc->tmuMemInfo[0].tramSize = 0x200000; @@ -1829,7 +1829,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, for ( buffer = 0; buffer < nColBuffers; buffer++ ) { gc->buffers0[buffer] = bufInfo->colBuffStart0[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->colBuffStart1[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers1[buffer]); @@ -1838,7 +1838,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, if (nAuxBuffers != 0) { gc->buffers0[buffer] = bufInfo->auxBuffStart0; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->auxBuffStart1; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers1[buffer]); @@ -1990,7 +1990,7 @@ GR_ENTRY(grSstWinOpen, GrContext_t, ( FxU32 hWnd, gcFifo->fifoPtr ); #ifdef __linux__ - _grImportFifo(*driInfo.fifoPtr, *driInfo.fifoRead); + _grImportFifo((AnyPtr)*driInfo.fifoPtr, (AnyPtr)*driInfo.fifoRead); #endif /* The hw is now in a usable state from the fifo macros. @@ -2195,7 +2195,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, * current gc. This gc is valid for all threads in the fullscreen * context. */ - setThreadValue( (FxU32)&_GlideRoot.GCs[_GlideRoot.current_sst] ); + setThreadValue( (AnyPtr)&_GlideRoot.GCs[_GlideRoot.current_sst] ); { /* Partial Argument Validation */ @@ -2687,7 +2687,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, for (buffer = 0; buffer < nColBuffers; buffer++) { gc->buffers0[buffer] = bufInfo->colBuffStart0[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->colBuffStart1[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers1[buffer]); @@ -2696,7 +2696,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, if (nAuxBuffers != 0) { gc->buffers0[buffer] = bufInfo->auxBuffStart0; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->auxBuffStart1; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers1[buffer]); @@ -2899,7 +2899,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, for ( buffer = 0; buffer < nColBuffers; buffer++ ) { gc->buffers0[buffer] = bufInfo->colBuffStart0[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->colBuffStart1[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers1[buffer]); @@ -2908,7 +2908,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, if (nAuxBuffers != 0) { gc->buffers0[buffer] = bufInfo->auxBuffStart0; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->auxBuffStart1; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers1[buffer]); @@ -3057,7 +3057,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, for ( buffer = 0; buffer < nColBuffers; buffer++ ) { gc->buffers0[buffer] = bufInfo->colBuffStart0[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->colBuffStart1[buffer]; GDBG_INFO(80, "Buffer %d: Start: 0x%x\n", buffer, gc->buffers1[buffer]); @@ -3066,7 +3066,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, if (nAuxBuffers != 0) { gc->buffers0[buffer] = bufInfo->auxBuffStart0; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers0[buffer]); - gc->lfbBuffers[buffer] = (FxU32)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; + gc->lfbBuffers[buffer] = (AnyPtr)gc->rawLfb + bufInfo->lfbBuffAddr0[buffer]; if (bInfo->buffInfo.enable2ndbuffer) { gc->buffers1[buffer] = bufInfo->auxBuffStart1; GDBG_INFO(80, "Aux Buffer: Start: 0x%x\n", gc->buffers1[buffer]); @@ -3219,7 +3219,7 @@ GR_EXT_ENTRY(grSstWinOpenExt, GrContext_t, ( FxU32 hWnd, gcFifo->fifoPtr ); #ifdef __linux__ - _grImportFifo(*driInfo.fifoPtr, *driInfo.fifoRead); + _grImportFifo((AnyPtr)*driInfo.fifoPtr, (AnyPtr)*driInfo.fifoRead); #endif /* The hw is now in a usable state from the fifo macros. @@ -3499,7 +3499,7 @@ GR_ENTRY(grSstWinClose, FxBool, (GrContext_t context)) * the tls gc explicitly otherwise other whacky-ness (read 'random * crashes' will ensue). */ - setThreadValue((FxU32)gc); + setThreadValue((AnyPtr)gc); if ((gc != NULL) && gc->open) grFlush(); /* Make sure that the user specified gc is not whacked */ @@ -3798,8 +3798,8 @@ GR_ENTRY(grFlush, void, (void)) if ( gc->windowed ) { #ifdef GLIDE_INIT_HWC GDBG_INFO(gc->myLevel + 200, FN_NAME": cmdSize(0x%X)\n", - ((FxU32)gc->cmdTransportInfo.fifoPtr - - (FxU32)gc->cmdTransportInfo.hwcFifoInfo.cmdBuf.baseAddr)); + ((AnyPtr)gc->cmdTransportInfo.fifoPtr - + (AnyPtr)gc->cmdTransportInfo.hwcFifoInfo.cmdBuf.baseAddr)); _FifoFlush(); #endif } else if (!gc->cmdTransportInfo.autoBump) { diff --git a/glide3x/h5/glide3/src/gstrip.c b/glide3x/h5/glide3/src/gstrip.c index d51d48b..3855a30 100644 --- a/glide3x/h5/glide3/src/gstrip.c +++ b/glide3x/h5/glide3/src/gstrip.c @@ -207,10 +207,14 @@ _grDrawVertexList(FxU32 pktype, FxU32 type, FxI32 mode, FxI32 count, void *point FxU32 dataElem; float *vPtr; - vPtr = pointers; - if (mode) - vPtr = *(float **)vPtr; - (float *)pointers += stride; + if (mode) { + vPtr = *(float **)pointers; + (float **)pointers += stride; + } + else { + vPtr = (float *)pointers; + (float *)pointers += stride; + } TRI_SETF(FARRAY(vPtr, 0)); dataElem = 0; @@ -241,16 +245,20 @@ _grDrawVertexList(FxU32 pktype, FxU32 type, FxI32 mode, FxI32 count, void *point for (k = 0; k < vcount; k++) { float *vPtr; - vPtr = pointers; - if (mode) - vPtr = *(float **)vPtr; + if (mode) { + vPtr = *(float **)pointers; + (float **)pointers += stride; + } + else { + vPtr = (float *)pointers; + (float *)pointers += stride; + } oow = 1.0f / FARRAY(vPtr, gc->state.vData.wInfo.offset); /* x, y */ TRI_SETF(FARRAY(vPtr, 0) *oow*gc->state.Viewport.hwidth + gc->state.Viewport.ox); TRI_SETF(FARRAY(vPtr, 4) *oow*gc->state.Viewport.hheight + gc->state.Viewport.oy); - (float *)pointers += stride; TRI_VP_SETFS(vPtr, oow); } diff --git a/glide3x/h5/glide3/src/gtexdl.c b/glide3x/h5/glide3/src/gtexdl.c index 29f4fbe..394b665 100644 --- a/glide3x/h5/glide3/src/gtexdl.c +++ b/glide3x/h5/glide3/src/gtexdl.c @@ -471,7 +471,7 @@ GR_DDFUNC(_grTexDownloadPalette, while(i < start + slopCount) { FxU32 entry; - entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF); + entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF)); gc->state.shadow.paletteRow[i>>3].data[i&7] = entry; REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry ); @@ -489,7 +489,7 @@ GR_DDFUNC(_grTexDownloadPalette, while(i < endIndex) { FxU32 entry; - entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF); + entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF)); gc->state.shadow.paletteRow[i>>3].data[i&7] = entry; REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry ); @@ -508,7 +508,7 @@ GR_DDFUNC(_grTexDownloadPalette, while(i <= end) { FxU32 entry; - entry = (0x80000000 | ((i & 0xFE) << 23) | pal->data[i] & 0xFFFFFF); + entry = (0x80000000 | ((i & 0xFE) << 23) | (pal->data[i] & 0xFFFFFF)); gc->state.shadow.paletteRow[i>>3].data[i&7] = entry; REG_GROUP_SET(hw, nccTable0[4 + (i & 0x07)], entry ); diff --git a/glide3x/h5/glide3/src/gthread.c b/glide3x/h5/glide3/src/gthread.c index f6e0034..93734fc 100644 --- a/glide3x/h5/glide3/src/gthread.c +++ b/glide3x/h5/glide3/src/gthread.c @@ -64,13 +64,13 @@ initThreadStorage( void ) } /* initThreadStorage */ -void setThreadValue( FxU32 value ) { +void setThreadValue( AnyPtr value ) { GR_CHECK_F( "setThreadValue", !threadInit, "Thread storage not initialized\n" ); TlsSetValue( _GlideRoot.tlsIndex, (void*)value ); } #pragma warning (4:4035) /* No return value */ -FxU32 getThreadValueSLOW( void ) { +AnyPtr getThreadValueSLOW( void ) { GR_CHECK_F( "getThreadValue", !threadInit, "Thread storage not initialized\n" ); #if 0 @@ -125,18 +125,18 @@ void endCriticalSection( void ) { #include "fxglide.h" #include "fxcmd.h" -FxU32 _threadValueMacOS; +AnyPtr _threadValueMacOS; void initThreadStorage(void) { } -void setThreadValue( FxU32 value ) +void setThreadValue( AnyPtr value ) { _threadValueMacOS = value; } -FxU32 getThreadValueSLOW( void ) +AnyPtr getThreadValueSLOW( void ) { return _threadValueMacOS; } @@ -169,7 +169,7 @@ void endCriticalSection(void) #include "fxglide.h" #include "fxcmd.h" -FxU32 threadValueLinux; +AnyPtr threadValueLinux; void initThreadStorage(void) { @@ -177,12 +177,12 @@ void initThreadStorage(void) -void setThreadValue( FxU32 value ) +void setThreadValue( AnyPtr value ) { threadValueLinux = value; } -FxU32 getThreadValueSLOW( void ) +AnyPtr getThreadValueSLOW( void ) { return threadValueLinux; } diff --git a/glide3x/h5/glide3/src/makefile.autoconf.am b/glide3x/h5/glide3/src/makefile.autoconf.am index 60eb600..ba0b36c 100644 --- a/glide3x/h5/glide3/src/makefile.autoconf.am +++ b/glide3x/h5/glide3/src/makefile.autoconf.am @@ -183,11 +183,17 @@ xtexdl_3dnow.o xtexdl_3dnow.lo: xtexdl.s fxgasm.h $(CP) $*.o $*.lo $(RM) -f $*.tmp.s -cpudtect.o cpudtct.lo: cpudtect.s +if FX_GLIDE_C_CPU_DETECT +CPUSOURCES = cpudtect.c +else +CPUSOURCES = cpudtect.s + +cpudtect.o cpudtect.lo: cpudtect.s $(PREPROCESSOR) -DUSE_PACKET_FIFO=1 $< > $*.tmp.s $(CC) $(AFLAGS) -c -o $*.o $*.tmp.s $(CP) $*.o $*.lo $(RM) -f $*.tmp.s +endif # # Library definitions. @@ -231,7 +237,7 @@ libglide3x_la_SOURCES = fxinline.h fxgasm.h \ gbanner.c gerror.c gaa.c gdraw.c \ gglide.c distate.c gstrip.c distrip.c \ diget.c glfb.c gsst.c gtex.c gtexdl.c \ - fifo.c cpudtect.s $(VGLIDE_SRC) + fifo.c $(CPUSOURCES) $(VGLIDE_SRC) libglide3x_la_LDFLAGS = -version-info 13:0:10 libglide3x_la_LIBADD = $(WHOLE_LIBS) $(LINK_LIBS) diff --git a/glide3x/h5/glide3/src/makefile.linux b/glide3x/h5/glide3/src/makefile.linux index 48427ea..5a18080 100644 --- a/glide3x/h5/glide3/src/makefile.linux +++ b/glide3x/h5/glide3/src/makefile.linux @@ -45,6 +45,13 @@ endif FX_GLIDE_REAL_HW= 1 FX_GLIDE_NO_FIFO= 1 +MACHINETYPE=$(shell $(BUILD_ROOT_SWLIBS)/include/make/machinetype) +ifeq ($(MACHINETYPE),alpha) +FX_GLIDE_CTRISETUP = 1 +else +FX_GLIDE_CTRISETUP = 0 +endif + HWSPEC = fifo.c LCDEFS += -DH3 $(CMDXPORTDEFS) INITLIB = $(BUILD_ROOT)/$(FX_GLIDE_HW)/lib$(FX_GLIDE_HW)init.a @@ -202,8 +209,6 @@ LADEFS += $(ASM_REGMAP_DEFS) LAINCS = -I$(BUILD_ROOT)/$(FX_GLIDE_HW)/include LAOPTS = $(DBGOPTS) $(DSPOPTS) $(OPTOPTS) -AFILES = $(ASMTRISETUP) cpudtect.s - # sources HEADERS = glide.h glidesys.h glideutl.h g3ext.h PRIVATE_HEADERS = fxglide.h gsstdef.h fxinline.h fxcmd.h fxsplash.h @@ -213,7 +218,7 @@ INSTALL_DESTINATION = $(BUILD_ROOT)/$(FX_GLIDE_HW) CFILES += gsplash.c g3df.c gu.c gthread.c \ gpci.c diglide.c disst.c ditex.c \ gbanner.c gerror.c gaa.c gdraw.c gglide.c $(GLIDE3FILES) \ - glfb.c gsst.c gtex.c gtexdl.c $(HWSPEC) + glfb.c gsst.c gtex.c gtexdl.c cpudtect.c $(HWSPEC) OFILES = $(CFILES:.c=.o) @@ -285,7 +290,6 @@ PREPROCESSOR=/lib/cpp -$$ xdraw2.o : xdraw2.s xdraw2.inc.s fxgasm.h xdraw3.o : xdraw3.s fxgasm.h -cpudtect.o: cpudtect.s # 3DNow!(tm) dependencies # XXX_def.obj targets are the default targets diff --git a/glide3x/h5/glide3/src/xtexdl_def.c b/glide3x/h5/glide3/src/xtexdl_def.c index d035e9a..1e60eea 100644 --- a/glide3x/h5/glide3/src/xtexdl_def.c +++ b/glide3x/h5/glide3/src/xtexdl_def.c @@ -289,7 +289,7 @@ _grTexDownload_Default_8_4(struct GrGC_s* gc, const FxU32 tmuBaseAddr, const FxU32 t0 = *(const FxU32*)src8; GDBG_INFO(195, "s = %d, t = %d, address = 0x%x\n", s, t, - (FxU32) tex_address - (FxU32) gc->tex_ptr + 0x200000); + (AnyPtr) tex_address - (AnyPtr) gc->tex_ptr + 0x200000); LINEAR_WRITE_SET_8(tex_address, t0); @@ -382,7 +382,7 @@ _grTexDownload_Default_8_WideS(struct GrGC_s* gc, const FxU32 tmuBaseAddr, t1 = *(const FxU32*)(src8 + 4); GDBG_INFO(195, "s = %d, t = %d, address = 0x%x\n", s, t, - (FxU32) tex_address - (FxU32) gc->tex_ptr + 0x200000); + (AnyPtr) tex_address - (AnyPtr) gc->tex_ptr + 0x200000); LINEAR_WRITE_SET_8(tex_address + 0, t0); LINEAR_WRITE_SET_8(tex_address + 4, t1); @@ -542,7 +542,7 @@ _grTexDownload_Default_16_WideS(struct GrGC_s* gc, const FxU32 tmuBaseAddr, const FxU32 t1 = *(const FxU32*)(src16 + 2); GDBG_INFO(195, "s = %d, t = %d, address = 0x%x\n", s, t, - (FxU32) tex_address - (FxU32) gc->tex_ptr + 0x200000); + (AnyPtr) tex_address - (AnyPtr) gc->tex_ptr + 0x200000); LINEAR_WRITE_SET_16(tex_address + 0, t0); LINEAR_WRITE_SET_16(tex_address + 4, t1); @@ -609,7 +609,7 @@ _grTexDownload_Default_32_WideS(struct GrGC_s* gc, const FxU32 tmuBaseAddr, const FxU32 t1 = *(src32 + 1); GDBG_INFO(195, "s = %d, t = %d, address = 0x%x\n", s, t, - (FxU32) tex_address - (FxU32) gc->tex_ptr + 0x200000); + (AnyPtr) tex_address - (AnyPtr) gc->tex_ptr + 0x200000); LINEAR_WRITE_SET(tex_address, t0); LINEAR_WRITE_SET(tex_address + 4, t1); diff --git a/glide3x/h5/incsrc/fxhal.h b/glide3x/h5/incsrc/fxhal.h index 3948682..01969cc 100644 --- a/glide3x/h5/incsrc/fxhal.h +++ b/glide3x/h5/incsrc/fxhal.h @@ -105,7 +105,7 @@ FX_ENTRY void FX_CALL fxHalPutenv(char *buf); FX_ENTRY HalInfo * FX_CALL fxHalInit(FxU32 flags); FX_ENTRY FxU32 FX_CALL fxHalNumBoardsInSystem(void); FX_ENTRY SstRegs * FX_CALL fxHalMapBoard(FxU32 boardNum); -FX_ENTRY FxBool FX_CALL fxHalInitCmdFifo( SstRegs *sst, int which, FxU32 fifoStart, +FX_ENTRY FxBool FX_CALL fxHalInitCmdFifo( SstRegs *sst, int which, AnyPtr fifoStart, FxU32 size, FxBool directExec, FxBool disableHoles, FxBool agpEnable); FX_ENTRY FxBool FX_CALL fxHalInitRegisters(SstRegs *sst); FX_ENTRY FxBool FX_CALL fxHalInitRenderingRegisters(SstRegs *sst); @@ -212,9 +212,18 @@ fxHalInitVideoOverlaySurface( #define AGPWRP(aHi,aLo,d) AGPWRV( *agpPhysToVirt(aHi,aLo), d ) #define AGPRDP(aHi,aLo) AGPRDV( *agpPhysToVirt(aHi,aLo) ) #else // #ifdef HAL_CSIM // REAL hw +#ifdef __alpha__ +extern unsigned char _fxget8(unsigned char *); +extern unsigned short _fxget16(unsigned short *); +extern unsigned int _fxget32(unsigned int *); + #define GET8(s) _fxget8((unsigned byte *)&s); + #define GET16(s) _fxget16((unsigned short *)&s); + #define GET(s) _fxget32((unsigned int *)&s); +#else #define GET8(s) s #define GET16(s) s #define GET(s) s +#endif #define SET8(d,s) d = s #define SET16(d,s) d = s #define SET(d,s) d = s diff --git a/glide3x/h5/incsrc/h3defs.h b/glide3x/h5/incsrc/h3defs.h index b9dcfec..5206374 100644 --- a/glide3x/h5/incsrc/h3defs.h +++ b/glide3x/h5/incsrc/h3defs.h @@ -62,11 +62,21 @@ // this crazy macro tests the sign bit of a float by loading it into // an integer register and then testing the sign bit of the integer +#if defined(__LP64__) +/* On IA-64, it's faster to do this the obvious way... -davidm 00/08/09 */ +#define FLOAT_ISNEG(f) ((f) < 0.0) +#else #define FLOAT_ISNEG(f) ((*(int *)(&(f))) < 0) +#endif // these crazy macros returns the sign of a number (1 if >= 0; -1 if < 0) +#if defined(__LP64__) +#define ISIGN(x) ((x) >= 0 ? 1 : -1) +#define FSIGN(f) ((f) >= 0.0 ? 1 : -1) +#else #define ISIGN(x) (((x) | 0x40000000L) >> 30) #define FSIGN(f) ISIGN(*(long *)&f) +#endif #define BIT(n) (1UL<<(n)) #define SST_MASK(n) (0xFFFFFFFFL >> (32-(n))) @@ -2013,9 +2023,9 @@ //----------------- useful addressing macros ----------------------- // return pointer to SST at specified WRAP, CHIP, or TREX -#define SST_WRAP(sst,n) ((SstRegs *)((n)*0x4000+(FxI32)(sst))) -#define SST_CHIP(sst,n) ((SstRegs *)((n)*0x400+(FxI32)(sst))) -#define SST_TMU(sst,n) ((SstRegs *)((0x800<<(n))+(FxI32)(sst))) +#define SST_WRAP(sst,n) ((SstRegs *)((n)*0x4000+(long)(sst))) +#define SST_CHIP(sst,n) ((SstRegs *)((n)*0x400+(long)(sst))) +#define SST_TMU(sst,n) ((SstRegs *)((0x800<<(n))+(long)(sst))) #define SST_TREX(sst,n) SST_TMU(sst,n) // offsets from the base of memBaseAddr0 @@ -2062,7 +2072,7 @@ #define SST_IS_REGISTER_ADDR(a) ( (a) >= SST_IO_OFFSET && (a) < SST_TEX_OFFSET ) -#define SST_BASE_ADDRESS(sst) ((FxI32)(sst)-SST_3D_OFFSET) +#define SST_BASE_ADDRESS(sst) ((AnyPtr)(sst)-SST_3D_OFFSET) #define SST_IO_ADDRESS(sst) (SST_IO_OFFSET+SST_BASE_ADDRESS(sst)) #define SST_CMDAGP_ADDRESS(sst) (SST_CMDAGP_OFFSET+SST_BASE_ADDRESS(sst)) #define SST_GUI_ADDRESS(sst) (SST_2D_OFFSET+SST_BASE_ADDRESS(sst)) diff --git a/glide3x/h5/incsrc/h3regs.h b/glide3x/h5/incsrc/h3regs.h index c9ccf0a..3cc8add 100644 --- a/glide3x/h5/incsrc/h3regs.h +++ b/glide3x/h5/incsrc/h3regs.h @@ -279,11 +279,19 @@ typedef volatile struct sstgregs { // THE 2D CHIP #ifndef _H2INC +#if defined(__alpha__) || defined(__LP64__) +typedef unsigned int Reg32u; +typedef int Reg32; +#else +typedef unsigned long Reg32u; +typedef long Reg32; +#endif + //----------------- SST chip 3D layout ------------------------- // registers are in groups of 8 for easy decode typedef struct vertex_Rec { - unsigned long x; // 12.4 format - unsigned long y; // 12.4 + Reg32u x; // 12.4 format + Reg32u y; // 12.4 } vtxRec; typedef volatile struct sstregs { // THE 3D CHIP @@ -294,127 +302,127 @@ typedef volatile struct sstregs { // THE 3D CHIP vtxRec vB; vtxRec vC; - long r; // 12.12 Parameters - long g; // 12.12 - long b; // 12.12 - long z; // 20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:") - long a; // 12.12 - long s; // 14.18 - long t; // 14.18 - long w; // 2.30 + Reg32 r; // 12.12 Parameters + Reg32 g; // 12.12 + Reg32 b; // 12.12 + Reg32 z; // 20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:") + Reg32 a; // 12.12 + Reg32 s; // 14.18 + Reg32 t; // 14.18 + Reg32 w; // 2.30 - long drdx; // X Gradients - long dgdx; - long dbdx; - long dzdx; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:") - long dadx; - long dsdx; - long dtdx; - long dwdx; + Reg32 drdx; // X Gradients + Reg32 dgdx; + Reg32 dbdx; + Reg32 dzdx; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:") + Reg32 dadx; + Reg32 dsdx; + Reg32 dtdx; + Reg32 dwdx; - long drdy; // Y Gradients - long dgdy; - long dbdy; - long dzdy; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:") - long dady; - long dsdy; - long dtdy; - long dwdy; + Reg32 drdy; // Y Gradients + Reg32 dgdy; + Reg32 dbdy; + Reg32 dzdy; //20.12 in 16bpp, 28.4 in 32bpp (there is an ugly hack in csimio.c, search "//EVIL:") + Reg32 dady; + Reg32 dsdy; + Reg32 dtdy; + Reg32 dwdy; - unsigned long triangleCMD; // execute a triangle command (float) - unsigned long reservedA; + Reg32u triangleCMD; // execute a triangle command (float) + Reg32u reservedA; vtxRec FvA; // floating point version vtxRec FvB; vtxRec FvC; - long Fr; // floating point version - long Fg; - long Fb; - long Fz; - long Fa; - long Fs; - long Ft; - long Fw; + Reg32 Fr; // floating point version + Reg32 Fg; + Reg32 Fb; + Reg32 Fz; + Reg32 Fa; + Reg32 Fs; + Reg32 Ft; + Reg32 Fw; - long Fdrdx; - long Fdgdx; - long Fdbdx; - long Fdzdx; - long Fdadx; - long Fdsdx; - long Fdtdx; - long Fdwdx; + Reg32 Fdrdx; + Reg32 Fdgdx; + Reg32 Fdbdx; + Reg32 Fdzdx; + Reg32 Fdadx; + Reg32 Fdsdx; + Reg32 Fdtdx; + Reg32 Fdwdx; - long Fdrdy; - long Fdgdy; - long Fdbdy; - long Fdzdy; - long Fdady; - long Fdsdy; - long Fdtdy; - long Fdwdy; + Reg32 Fdrdy; + Reg32 Fdgdy; + Reg32 Fdbdy; + Reg32 Fdzdy; + Reg32 Fdady; + Reg32 Fdsdy; + Reg32 Fdtdy; + Reg32 Fdwdy; - unsigned long FtriangleCMD; // execute a triangle command - unsigned long fbzColorPath; // color select and combine - unsigned long fogMode; // fog Mode - unsigned long alphaMode; // alpha Mode - unsigned long fbzMode; // framebuffer and Z mode - unsigned long lfbMode; // linear framebuffer Mode - unsigned long clipLeftRight; // (6)10(6)10 - unsigned long clipBottomTop; // (6)10(6)10 + Reg32u FtriangleCMD; // execute a triangle command + Reg32u fbzColorPath; // color select and combine + Reg32u fogMode; // fog Mode + Reg32u alphaMode; // alpha Mode + Reg32u fbzMode; // framebuffer and Z mode + Reg32u lfbMode; // linear framebuffer Mode + Reg32u clipLeftRight; // (6)10(6)10 + Reg32u clipBottomTop; // (6)10(6)10 - unsigned long nopCMD; // execute a nop command - unsigned long fastfillCMD; // execute a fast fill command - unsigned long swapbufferCMD;// execute a swapbuffer command - unsigned long fogColor; // (8)888 - unsigned long zaColor; // 8.24 - unsigned long chromaKey; // (8)888 - unsigned long chromaRange; - unsigned long userIntrCmd; + Reg32u nopCMD; // execute a nop command + Reg32u fastfillCMD; // execute a fast fill command + Reg32u swapbufferCMD;// execute a swapbuffer command + Reg32u fogColor; // (8)888 + Reg32u zaColor; // 8.24 + Reg32u chromaKey; // (8)888 + Reg32u chromaRange; + Reg32u userIntrCmd; - unsigned long stipple; // 32 bits, MSB masks pixels - unsigned long c0; // 8.8.8.8 (ARGB) - unsigned long c1; // 8.8.8.8 (ARGB) + Reg32u stipple; // 32 bits, MSB masks pixels + Reg32u c0; // 8.8.8.8 (ARGB) + Reg32u c1; // 8.8.8.8 (ARGB) struct { // statistic gathering variables - unsigned long fbiPixelsIn; - unsigned long fbiChromaFail; - unsigned long fbiZfuncFail; - unsigned long fbiAfuncFail; - unsigned long fbiPixelsOut; + Reg32u fbiPixelsIn; + Reg32u fbiChromaFail; + Reg32u fbiZfuncFail; + Reg32u fbiAfuncFail; + Reg32u fbiPixelsOut; } stats; - unsigned long fogTable[32]; // 64 entries, 2 per word, 2 bytes each + Reg32u fogTable[32]; // 64 entries, 2 per word, 2 bytes each - unsigned long renderMode; // new 32bpp and 1555 modes - unsigned long stencilMode; - unsigned long stencilOp; - unsigned long colBufferAddr; //This is the primary colBufferAddr - unsigned long colBufferStride; - unsigned long auxBufferAddr; //This is the primary auxBufferAddr - unsigned long auxBufferStride; - unsigned long fbiStencilFail; + Reg32u renderMode; // new 32bpp and 1555 modes + Reg32u stencilMode; + Reg32u stencilOp; + Reg32u colBufferAddr; //This is the primary colBufferAddr + Reg32u colBufferStride; + Reg32u auxBufferAddr; //This is the primary auxBufferAddr + Reg32u auxBufferStride; + Reg32u fbiStencilFail; - unsigned long clipLeftRight1; - unsigned long clipBottomTop1; - unsigned long combineMode; - unsigned long sliCtrl; - unsigned long aaCtrl; - unsigned long chipMask; - unsigned long leftDesktopBuf; - unsigned long reservedD[2]; // NOTE: used to store TMUprivate ptr (reservedD[0]) + Reg32u clipLeftRight1; + Reg32u clipBottomTop1; + Reg32u combineMode; + Reg32u sliCtrl; + Reg32u aaCtrl; + Reg32u chipMask; + Reg32u leftDesktopBuf; + Reg32u reservedD[2]; // NOTE: used to store TMUprivate ptr (reservedD[0]) // NOTE: used to store CSIMprivate ptr (reservedD[1]) - unsigned long reservedE[7]; // NOTE: reservedE[0] stores the secondary colBufferAddr + Reg32u reservedE[7]; // NOTE: reservedE[0] stores the secondary colBufferAddr // NOTE: reservedE[1] stores the secondary auxBufferAddr // NOTE: reservedE[2] stores the primary colBufferAddr // NOTE: reservedE[3] stores the primary auxBufferAddr - unsigned long reservedF[3]; - unsigned long swapBufferPend; - unsigned long leftOverlayBuf; - unsigned long rightOverlayBuf; - unsigned long fbiSwapHistory; - unsigned long fbiTrianglesOut; // triangles out counter + Reg32u reservedF[3]; + Reg32u swapBufferPend; + Reg32u leftOverlayBuf; + Reg32u rightOverlayBuf; + Reg32u fbiSwapHistory; + Reg32u fbiTrianglesOut; // triangles out counter FxU32 sSetupMode; FxU32 sVx; @@ -436,24 +444,24 @@ typedef volatile struct sstregs { // THE 3D CHIP FxU32 sDrawTriCMD; FxU32 sBeginTriCMD; - unsigned long reservedG[6]; + Reg32u reservedG[6]; - unsigned long reservedH[8]; + Reg32u reservedH[8]; - unsigned long reservedI[8]; + Reg32u reservedI[8]; - unsigned long textureMode; // texture Mode - unsigned long tLOD; // texture LOD settings - unsigned long tDetail; // texture detail settings - unsigned long texBaseAddr; // current texture base address - unsigned long texBaseAddr1; - unsigned long texBaseAddr2; - unsigned long texBaseAddr38; - unsigned long trexInit0; // hardware init bits - unsigned long trexInit1; // hardware init bits + Reg32u textureMode; // texture Mode + Reg32u tLOD; // texture LOD settings + Reg32u tDetail; // texture detail settings + Reg32u texBaseAddr; // current texture base address + Reg32u texBaseAddr1; + Reg32u texBaseAddr2; + Reg32u texBaseAddr38; + Reg32u trexInit0; // hardware init bits + Reg32u trexInit1; // hardware init bits - unsigned long nccTable0[12]; // NCC decode tables, bits are packed - unsigned long nccTable1[12]; // 4 words Y, 4 words I, 4 words Q + Reg32u nccTable0[12]; // NCC decode tables, bits are packed + Reg32u nccTable1[12]; // 4 words Y, 4 words I, 4 words Q } SstRegs; diff --git a/glide3x/h5/minihwc/hwcext.h b/glide3x/h5/minihwc/hwcext.h index c64a105..d91ca69 100644 --- a/glide3x/h5/minihwc/hwcext.h +++ b/glide3x/h5/minihwc/hwcext.h @@ -256,7 +256,8 @@ typedef struct hwcExtLinearAddrReq_s { /* Returned from HWCEXT_GETLINEARADDR */ typedef struct hwcExtLinearAddrRes_s { FxU32 - numBaseAddrs, /* # base addresses */ + numBaseAddrs; /* # base addresses */ + AnyPtr baseAddresses[HWCEXT_MAX_BASEADDR]; /* linear Addresses */ } hwcExtLinearAddrRes_t; diff --git a/glide3x/h5/minihwc/hwcio.h b/glide3x/h5/minihwc/hwcio.h index 0f6b823..3bae423 100644 --- a/glide3x/h5/minihwc/hwcio.h +++ b/glide3x/h5/minihwc/hwcio.h @@ -46,6 +46,12 @@ extern char *cmdAGPRegNames[]; extern char *waxRegNames[]; extern char *sstRegNames[]; +#ifdef __alpha__ +extern unsigned int _fxget32(unsigned int *); +#define GET(s) _fxget32((unsigned int *)&s); +#define SET(d,s) d = s +#endif + #ifndef GET # define GET(s) s # define SET(d, s) d = s diff --git a/glide3x/h5/minihwc/linhwc.c b/glide3x/h5/minihwc/linhwc.c index 5e55f65..eeba7e1 100644 --- a/glide3x/h5/minihwc/linhwc.c +++ b/glide3x/h5/minihwc/linhwc.c @@ -66,7 +66,15 @@ hwcCheckMemSize(hwcBoardInfo *bInfo, FxU32 xres, FxU32 yres, FxU32 nColBuffers, #include "lindri.h" static FxU32 fenceVar; +#if defined(__i386__) #define P6FENCE asm("xchg %%eax, %0" : : "m" (fenceVar) : "eax"); +#elif defined(__alpha__) +#define P6FENCE +#elif defined(__ia64__) +#define P6FENCE asm volatile("mf.a" ::: "memory") +#elif +Error - need to define P6FENCE +#endif #define MAXFIFOSIZE 0x40000 #define FIFOPAD 0x0000 @@ -235,8 +243,8 @@ hwcMapBoard(hwcBoardInfo *bInfo, FxU32 bAddrMask) { bInfo->linearInfo.initialized = FXTRUE; bInfo->osNT = FXFALSE; bInfo->procHandle = getpid(); - bInfo->linearInfo.linearAddress[0]=(FxU32)driInfo.pRegs; - bInfo->linearInfo.linearAddress[1]=(FxU32)driInfo.pFB; + bInfo->linearInfo.linearAddress[0]=(AnyPtr)driInfo.pRegs; + bInfo->linearInfo.linearAddress[1]=(AnyPtr)driInfo.pFB; return FXTRUE; } @@ -971,7 +979,7 @@ char hwcGetCH( void ) { return lin_getch(); } -void grDRIImportFifo(int fifoPtr, int fifoRead) +void grDRIImportFifo(FxU32 fifoPtr, FxU32 fifoRead) { _grImportFifo(fifoPtr, fifoRead); } diff --git a/glide3x/h5/minihwc/minihwc.c b/glide3x/h5/minihwc/minihwc.c index 42ceca8..e3e2474 100644 --- a/glide3x/h5/minihwc/minihwc.c +++ b/glide3x/h5/minihwc/minihwc.c @@ -1613,7 +1613,7 @@ hwcMapBoard(hwcBoardInfo *bInfo, FxU32 bAddrMask) for (bAddr = 0; bAddr < 2; bAddr++) { if ((bAddrMask & (0x01UL << bAddr)) != 0x00UL) { bInfo->linearInfo.linearAddress[bAddr] = - (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID, + (AnyPtr)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID, length, &bInfo->deviceNum, bInfo->boardNum, bAddr); } } @@ -1622,13 +1622,13 @@ hwcMapBoard(hwcBoardInfo *bInfo, FxU32 bAddrMask) * unconditionally */ bInfo->linearInfo.linearAddress[2] = - (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID, + (AnyPtr)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID, length, &bInfo->deviceNum, bInfo->boardNum, 2); /* Does the caller want the rom bios? */ if ((bAddrMask & 0x08UL) != 0x00UL) { bInfo->linearInfo.linearAddress[3] = - (FxU32)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID, + (AnyPtr)pciMapCardMulti(bInfo->pciInfo.vendorID, bInfo->pciInfo.deviceID, 0x1000000, &bInfo->deviceNum, bInfo->boardNum, 3); } diff --git a/glide3x/h5/minihwc/minihwc.h b/glide3x/h5/minihwc/minihwc.h index d0b8c1a..049023d 100644 --- a/glide3x/h5/minihwc/minihwc.h +++ b/glide3x/h5/minihwc/minihwc.h @@ -313,14 +313,14 @@ typedef struct hwcPCIInfo_s { typedef struct hwcLinearInfo_s { FxBool initialized; - FxU32 + AnyPtr linearAddress[HWC_NUM_BASE_ADDR]; } hwcLinearInfo; typedef struct hwcRegInfo_s { FxBool initialized; - volatile FxU32 + volatile AnyPtr ioMemBase, /* mem base for I/O aliases */ cmdAGPBase, /* CMD/AGP register base */ waxBase, /* 2D register base */ @@ -344,11 +344,14 @@ typedef struct hwcFifoInfo_s { FxBool agpFifo, initialized; + AnyPtr + agpVirtAddr; FxU32 - agpVirtAddr, agpPhysAddr, - agpSize, - fifoStart, /* Beg of fifo (offset from base) */ + agpSize; + AnyPtr + fifoStart; /* Beg of fifo (offset from base) */ + FxU32 fifoLength; /* Fifo size in bytes */ } hwcFifoInfo;