From a96ecc4d15887adac822757bc9964b362d68306b Mon Sep 17 00:00:00 2001 From: jwrdegoede <> Date: Wed, 25 May 2005 08:51:53 +0000 Subject: [PATCH] Add #ifdef GL_X86 around x86 specific code --- glide3x/cvg/glide3/src/diglide.c | 5 +++++ glide3x/cvg/glide3/src/fxgasm.c | 4 ++++ glide3x/cvg/glide3/src/fxglide.h | 9 +++++++++ glide3x/cvg/glide3/src/gpci.c | 11 ++++++----- glide3x/cvg/incsrc/cpuid.h | 2 ++ glide3x/h3/glide3/src/diglide.c | 5 +++++ glide3x/h3/glide3/src/fxgasm.c | 4 ++++ glide3x/h3/glide3/src/fxglide.h | 10 +++++++++- glide3x/h3/glide3/src/gpci.c | 9 +++++++-- glide3x/h5/glide3/src/diglide.c | 2 ++ glide3x/h5/glide3/src/fxgasm.c | 4 ++++ glide3x/h5/glide3/src/fxglide.h | 4 ++++ glide3x/h5/glide3/src/glfb.c | 21 ++++++++++++++++++--- glide3x/h5/glide3/src/gpci.c | 4 ++++ glide3x/h5/incsrc/cpuid.h | 2 ++ glide3x/h5/minihwc/minihwc.c | 26 +++++++++++++++++++++----- glide3x/h5/minihwc/minihwc.h | 2 ++ glide3x/sst1/glide3/src/diglide.c | 9 +++++++++ glide3x/sst1/glide3/src/fxgasm.c | 4 ++++ glide3x/sst1/glide3/src/fxglide.h | 21 ++++++++++++++++++++- glide3x/sst1/glide3/src/gdraw.c | 6 +++++- glide3x/sst1/glide3/src/gglide.c | 10 ++++++++++ glide3x/sst1/glide3/src/gpci.c | 9 +++++++++ glide3x/sst1/glide3/src/gsst.c | 5 +++++ glide3x/sst1/glide3/src/gstrip.c | 8 +++++++- glide3x/sst1/glide3/src/gxdraw.c | 11 ++++++++++- glide3x/sst1/init/init.h | 2 ++ glide3x/sst1/init/init96/init96.c | 2 ++ 28 files changed, 191 insertions(+), 20 deletions(-) diff --git a/glide3x/cvg/glide3/src/diglide.c b/glide3x/cvg/glide3/src/diglide.c index 9afeeaf..ae6a007 100644 --- a/glide3x/cvg/glide3/src/diglide.c +++ b/glide3x/cvg/glide3/src/diglide.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.1.1 1999/12/07 21:42:30 joseph +** Initial checkin into SourceForge. +** ** ** 1 10/08/98 11:30a Brent ** @@ -264,9 +267,11 @@ GR_DIENTRY(grHints, void, (GrHint_t hintType, FxU32 hints)) gc->state.checkFifo = hints; break; +#if GL_X86 case GR_HINT_FPUPRECISION: hints ? double_precision_asm() : single_precision_asm(); break; +#endif case GR_HINT_ALLOW_MIPMAP_DITHER: /* Regardless of the game hint, force the user selection */ diff --git a/glide3x/cvg/glide3/src/fxgasm.c b/glide3x/cvg/glide3/src/fxgasm.c index efcb6b7..da86d9c 100644 --- a/glide3x/cvg/glide3/src/fxgasm.c +++ b/glide3x/cvg/glide3/src/fxgasm.c @@ -186,9 +186,13 @@ main (int argc, char **argv) NEWLINE; HEADER ("GlideRoot"); +#if GL_X86 OFFSET (gr,p6Fencer,"p6Fencer\t"); +#endif OFFSET (gr,current_sst,"current_sst\t"); +#if GL_X86 OFFSET (gr,CPUType,"CPUType\t\t"); +#endif OFFSET (gr,curGC,"curGC\t\t"); OFFSET (gr,curTriSize,"curTriSize\t"); diff --git a/glide3x/cvg/glide3/src/fxglide.h b/glide3x/cvg/glide3/src/fxglide.h index 01a8414..bfc68bc 100644 --- a/glide3x/cvg/glide3/src/fxglide.h +++ b/glide3x/cvg/glide3/src/fxglide.h @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.1.1.8.8 2004/12/23 20:24:08 koolsmoky +** remove old cpuid +** ** Revision 1.1.1.1.8.7 2004/11/25 18:56:59 koolsmoky ** support new cpuid ** @@ -1315,9 +1318,13 @@ typedef struct GrGC_s ** stuff near the top is accessed a lot */ struct _GlideRoot_s { +#if GL_X86 int p6Fencer; /* xchg to here to keep this in cache!!! */ +#endif int current_sst; +#if GL_X86 _p_info CPUType; /* CPUID */ +#endif GrGC *curGC; /* point to the current GC */ FxU32 packerFixAddress; /* address to write packer fix to */ FxBool windowsInit; /* Is the Windows part of glide initialized? */ @@ -3120,6 +3127,7 @@ _grErrorCallback(const char* const procName, va_list args); #endif +#if GL_X86 /* Returns 16:16 pair indicating the cpu's manufacturer and its * capabilities. Non-Intel processors should have a vendor id w/ the * high bit set so that it appears to be a negative #. The value of @@ -3152,6 +3160,7 @@ single_precision_asm(void); extern void GR_CDECL double_precision_asm(void); +#endif #ifdef GLIDE3 /* diff --git a/glide3x/cvg/glide3/src/gpci.c b/glide3x/cvg/glide3/src/gpci.c index adb2448..9fd4079 100644 --- a/glide3x/cvg/glide3/src/gpci.c +++ b/glide3x/cvg/glide3/src/gpci.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.1.1.8.5 2005/01/13 15:42:51 koolsmoky +** fixed warning typo +** ** Revision 1.1.1.1.8.4 2004/12/27 20:47:11 koolsmoky ** added dll entry point to call grGlideShutdown when a process is detached ** @@ -644,6 +647,7 @@ _GlideInitEnvironment(void) /* Setup the basic proc tables based on the cpu type. */ { +#if GL_X86 /* Get CPU Info */ _cpuid (&_GlideRoot.CPUType); @@ -662,9 +666,9 @@ _GlideInitEnvironment(void) _GlideRoot.CPUType.feature = _GlideRoot.CPUType.os_support = 0; GDBG_INFO(0,"CPU Extensions disabled\n"); } +#endif /* Default case */ -#if GLIDE_DISPATCH_SETUP || GLIDE_DISPATCH_DOWNLOAD #if GLIDE_DISPATCH_SETUP _GlideRoot.deviceArchProcs.curTriProcs = _triSetupProcs + 0; _GlideRoot.deviceArchProcs.curDrawTrisProc = _grDrawTriangles_Default; @@ -676,11 +680,9 @@ _GlideInitEnvironment(void) #endif /* GLIDE_DISPATCH_DOWNLOAD */ /* Check for vendor specific optimization cases */ -#ifdef GL_MMX +#if GL_MMX && GLIDE_DISPATCH_DOWNLOAD if (_GlideRoot.CPUType.os_support & _CPU_FEATURE_MMX) { -#if GLIDE_DISPATCH_DOWNLOAD _GlideRoot.deviceArchProcs.curTexProcs = _texDownloadProcs + 2; -#endif /* GLIDE_DISPATCH_DOWNLOAD */ } #endif /* GL_MMX */ #ifdef GL_AMD3D @@ -696,7 +698,6 @@ _GlideInitEnvironment(void) #endif /* GLIDE_DISPATCH_DOWNLOAD */ } #endif /* GL_AMD3D */ -#endif /* GLIDE_DISPATCH_SETUP || GLIDE_DISPATCH_DOWNLOAD */ } /* Check for user environment tweaks */ diff --git a/glide3x/cvg/incsrc/cpuid.h b/glide3x/cvg/incsrc/cpuid.h index 37c43fa..af955c9 100644 --- a/glide3x/cvg/incsrc/cpuid.h +++ b/glide3x/cvg/incsrc/cpuid.h @@ -1,5 +1,6 @@ #ifndef CPUID_H_included #define CPUID_H_included +#if GL_X86 #define _CPU_HAS_CPUID 0xffff #define _CPU_FEATURE_MMX 0x0001 @@ -21,3 +22,4 @@ typedef struct _processor_info { int _cpuid (_p_info *); #endif +#endif diff --git a/glide3x/h3/glide3/src/diglide.c b/glide3x/h3/glide3/src/diglide.c index 203dd4e..cb65327 100644 --- a/glide3x/h3/glide3/src/diglide.c +++ b/glide3x/h3/glide3/src/diglide.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.1.1 1999/11/24 21:44:54 joseph +** Initial checkin for SourceForge +** ** ** 4 4/06/99 3:54p Dow ** Alt tab again. @@ -313,9 +316,11 @@ GR_DIENTRY(grHints, void, (GrHint_t hintType, FxU32 hints)) gc->state.checkFifo = hints; break; +#if GL_X86 case GR_HINT_FPUPRECISION: hints ? double_precision_asm() : single_precision_asm(); break; +#endif case GR_HINT_ALLOW_MIPMAP_DITHER: /* Regardless of the game hint, force the user selection */ diff --git a/glide3x/h3/glide3/src/fxgasm.c b/glide3x/h3/glide3/src/fxgasm.c index 184208d..b5da106 100644 --- a/glide3x/h3/glide3/src/fxgasm.c +++ b/glide3x/h3/glide3/src/fxgasm.c @@ -188,9 +188,13 @@ main (int argc, char **argv) #endif HEADER ("GlideRoot"); +#if GL_X86 OFFSET (gr,p6Fencer,"p6Fencer\t"); +#endif OFFSET (gr,current_sst,"current_sst\t"); +#if GL_X86 OFFSET (gr,CPUType,"CPUType\t\t"); +#endif OFFSET (gr,tlsOffset,"tlsOffset\t\t"); OFFSET (gr, pool.f255,"pool_f255"); SIZEOF (gr.GCs[0].state,"GrState\t"); diff --git a/glide3x/h3/glide3/src/fxglide.h b/glide3x/h3/glide3/src/fxglide.h index bbe539c..d89ab92 100644 --- a/glide3x/h3/glide3/src/fxglide.h +++ b/glide3x/h3/glide3/src/fxglide.h @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.2.4.9 2004/10/07 07:48:50 dborca +** comment the GR_CDECL hack to prevent accidents +** ** Revision 1.2.4.8 2004/10/07 07:16:38 dborca ** corrected grDrawTriangle on MSVC ** @@ -1394,14 +1397,18 @@ typedef struct GrGC_s ** stuff near the top is accessed a lot */ struct _GlideRoot_s { +#if GL_X86 int p6Fencer; /* xchg to here to keep this in cache!!! */ +#endif FxU32 tlsIndex, tlsOffset; int current_sst; +#if GL_X86 FxU32 CPUType; +#endif FxBool OSWin95; FxI32 @@ -2270,6 +2277,7 @@ _grErrorCallback(const char* const procName, va_list args); #endif +#if GL_X86 /* Returns 16:16 pair indicating the cpu's manufacturer and its * capabilities. Non-Intel processors should have a vendor id w/ the * high bit set so that it appears to be a negative #. The value of @@ -2317,7 +2325,7 @@ single_precision_asm(void); extern void GR_CDECL double_precision_asm(void); - +#endif /* The translation macros convert from the reasonable log2 formats to * the somewhat whacked sst1 lod format. The api and internal diff --git a/glide3x/h3/glide3/src/gpci.c b/glide3x/h3/glide3/src/gpci.c index 44e7617..5046981 100644 --- a/glide3x/h3/glide3/src/gpci.c +++ b/glide3x/h3/glide3/src/gpci.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.2.2.2 2004/10/08 06:22:10 dborca +** use whatever swap interval user decides +** ** Revision 1.2.2.1 2004/02/16 07:42:16 dborca ** grSetNumPendingBuffers visible with grGetProcAddress ** @@ -906,8 +909,10 @@ _GlideInitEnvironment(void) _GlideRoot.environment.gammaG = GLIDE_FGETENV("SSTH3_GGAMMA", -1.f); _GlideRoot.environment.gammaB = GLIDE_FGETENV("SSTH3_BGAMMA", -1.f); +#ifdef GL_X86 _GlideRoot.CPUType = GLIDE_GETENV("FX_CPU", _cpu_detect_asm() ); GDBG_INFO(0," cpu: 0x%x\n",_GlideRoot.CPUType); +#endif /* Setup the basic proc tables based on the cpu type. */ { @@ -927,12 +932,12 @@ _GlideInitEnvironment(void) _GlideRoot.deviceArchProcs.nullTexProcs = _texDownloadProcs + ARRAY_LAST(_texDownloadProcs); #undef ARRAY_LAST +#if GL_AMD3D /* Check for vendor specific optimization cases */ switch((_GlideRoot.CPUType & 0xFFFF0000UL) >> 16UL) { case kCPUVendorIntel: break; -#if GL_AMD3D case kCPUVendorAMD: case kCPUVendorCyrix: case kCPUVendorIDT: @@ -944,12 +949,12 @@ _GlideInitEnvironment(void) _GlideRoot.deviceArchProcs.curTexProcs = _texDownloadProcs + 1; } break; -#endif /* GL_AMD3D */ case kCPUVendorUnknown: default: break; } +#endif /* GL_AMD3D */ } #if __POWERPC__ && PCI_BUMP_N_GRIND _GlideRoot.environment.autoBump = FXFALSE; diff --git a/glide3x/h5/glide3/src/diglide.c b/glide3x/h5/glide3/src/diglide.c index 8a674f0..620aa5e 100644 --- a/glide3x/h5/glide3/src/diglide.c +++ b/glide3x/h5/glide3/src/diglide.c @@ -320,9 +320,11 @@ GR_DIENTRY(grHints, void, (GrHint_t hintType, FxU32 hints)) gc->state.checkFifo = hints; break; +#if GL_X86 case GR_HINT_FPUPRECISION: hints ? double_precision_asm() : single_precision_asm(); break; +#endif case GR_HINT_ALLOW_MIPMAP_DITHER: /* Regardless of the game hint, force the user selection */ diff --git a/glide3x/h5/glide3/src/fxgasm.c b/glide3x/h5/glide3/src/fxgasm.c index 81996dc..3d18c6e 100644 --- a/glide3x/h5/glide3/src/fxgasm.c +++ b/glide3x/h5/glide3/src/fxgasm.c @@ -191,9 +191,13 @@ main (int argc, char **argv) #endif HEADER ("GlideRoot"); +#if GL_X86 OFFSET (gr,p6Fencer,"p6Fencer\t"); +#endif OFFSET (gr,current_sst,"current_sst\t"); +#if GL_X86 OFFSET (gr,CPUType,"CPUType\t\t"); +#endif OFFSET (gr,tlsOffset,"tlsOffset\t\t"); OFFSET (gr, pool.f255,"pool_f255"); OFFSET (gr, pool.f1,"pool_f1"); diff --git a/glide3x/h5/glide3/src/fxglide.h b/glide3x/h5/glide3/src/fxglide.h index 0ed08e3..ba23b36 100644 --- a/glide3x/h5/glide3/src/fxglide.h +++ b/glide3x/h5/glide3/src/fxglide.h @@ -2025,14 +2025,18 @@ typedef struct GrGC_s ** stuff near the top is accessed a lot */ struct _GlideRoot_s { +#if GL_X86 int p6Fencer; /* xchg to here to keep this in cache!!! */ +#endif FxU32 tlsIndex; FxU32 tlsOffset; int current_sst; FxI32 windowsInit; /* Is the fullscreen part of glide initialized? */ +#if GL_X86 _p_info CPUType; /* CPUID */ +#endif #if !GLIDE_HW_TRI_SETUP || !GLIDE_PACKET3_TRI_SETUP FxU32 paramCount; diff --git a/glide3x/h5/glide3/src/glfb.c b/glide3x/h5/glide3/src/glfb.c index 75ee817..8f38812 100644 --- a/glide3x/h5/glide3/src/glfb.c +++ b/glide3x/h5/glide3/src/glfb.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.7.4.20 2005/05/07 08:40:30 jwrdegoede +** lvalue cast fixes for gcc4 +** ** Revision 1.7.4.19 2004/10/05 14:54:43 dborca ** DOS/OpenWatcom woes ** @@ -2265,6 +2268,7 @@ _grLfbWriteRegion(FxBool pixPipelineP, case GR_LFB_SRC_FMT_ZA16: dstData = (FxU32*)(((FxU16*)dstData) + dst_x); #if SET_LFB_STRAIGHT +#if GL_X86 if (_GlideRoot.CPUType.os_support & _CPU_FEATURE_MMX) { do { MMX_DSTLINE2(srcData, dstData, src_width); @@ -2274,7 +2278,10 @@ _grLfbWriteRegion(FxBool pixPipelineP, } while (--scanline); MMX_RESET(); break; - } else { + } + else +#endif + { do { FPU_DSTLINE2(srcData, dstData, src_width); /* adjust for next line */ @@ -2345,6 +2352,7 @@ _grLfbWriteRegion(FxBool pixPipelineP, case GR_LFBWRITEMODE_Z32: dstData = ((FxU32*)dstData) + dst_x; #if SET_LFB_STRAIGHT +#if GL_X86 if (_GlideRoot.CPUType.os_support & _CPU_FEATURE_MMX) { do { MMX_DSTLINE4(srcData, dstData, src_width); @@ -2354,7 +2362,10 @@ _grLfbWriteRegion(FxBool pixPipelineP, } while (--scanline); MMX_RESET(); break; - } else { + } + else +#endif + { do { FPU_DSTLINE4(srcData, dstData, src_width); /* adjust for next line */ @@ -2521,6 +2532,7 @@ static FxBool grLfbReadRegionOrigin (GrBuffer_t src_buffer, GrOriginLocation_t o len = src_width * bpp; if(!gc->state.forced32BPP) { +#if GL_X86 if(_GlideRoot.CPUType.os_support & _CPU_FEATURE_MMX) { do { MMX_SRCLINE(src, dst_data, len); @@ -2529,7 +2541,10 @@ static FxBool grLfbReadRegionOrigin (GrBuffer_t src_buffer, GrOriginLocation_t o dst_data = (FxU32 *)((FxU8 *)dst_data + dst_stride); } while (--src_height); MMX_RESET(); - } else { + } + else +#endif + { do { FPU_SRCLINE(src, dst_data, len); /* adjust for next line */ diff --git a/glide3x/h5/glide3/src/gpci.c b/glide3x/h5/glide3/src/gpci.c index 2408f94..0d3b85e 100644 --- a/glide3x/h5/glide3/src/gpci.c +++ b/glide3x/h5/glide3/src/gpci.c @@ -1367,6 +1367,7 @@ _GlideInitEnvironment(void) } #endif +#if GL_X86 /* Get CPU Info before we detect glide devices */ _cpuid (&_GlideRoot.CPUType); @@ -1378,6 +1379,7 @@ _GlideInitEnvironment(void) GDBG_INFO(80," 3DNow Support: %c\n", _GlideRoot.CPUType.os_support&_CPU_FEATURE_3DNOW ? 'Y' : 'N'); GDBG_INFO(80," MMX+ Support: %c\n", _GlideRoot.CPUType.os_support&_CPU_FEATURE_MMXPLUS ? 'Y' : 'N'); GDBG_INFO(80,"3DNow+ Support: %c\n", _GlideRoot.CPUType.os_support&_CPU_FEATURE_3DNOWPLUS ? 'Y' : 'N'); +#endif /* Check for user environment tweaks */ #define GLIDE_GETENV(__envVar, __defVal) \ @@ -1387,6 +1389,7 @@ _GlideInitEnvironment(void) #define GLIDE_34GETENV(__envVar, __defVal) \ (((signed char)(atof(((envStr = GETENV(__envVar)) == NULL) ? (__defVal) : (envStr))*16.0f)+8)&0x7f) +#if GL_X86 /* No CPU Extensions Allowed */ if (GLIDE_GETENV("FX_GLIDE_NO_CPU_EXTENSIONS", 0L)) { @@ -1397,6 +1400,7 @@ _GlideInitEnvironment(void) #if !DRI_BUILD /* Pass retrieved CPU Info into minihwc */ hwcSetCPUInfo(&_GlideRoot.CPUType); +#endif #endif /* KoolSmoky - detect glide devices before we check for user diff --git a/glide3x/h5/incsrc/cpuid.h b/glide3x/h5/incsrc/cpuid.h index 37c43fa..af955c9 100644 --- a/glide3x/h5/incsrc/cpuid.h +++ b/glide3x/h5/incsrc/cpuid.h @@ -1,5 +1,6 @@ #ifndef CPUID_H_included #define CPUID_H_included +#if GL_X86 #define _CPU_HAS_CPUID 0xffff #define _CPU_FEATURE_MMX 0x0001 @@ -21,3 +22,4 @@ typedef struct _processor_info { int _cpuid (_p_info *); #endif +#endif diff --git a/glide3x/h5/minihwc/minihwc.c b/glide3x/h5/minihwc/minihwc.c index bdc6666..ee7a479 100644 --- a/glide3x/h5/minihwc/minihwc.c +++ b/glide3x/h5/minihwc/minihwc.c @@ -980,7 +980,9 @@ static __inline int min (int x, int y) #define HWC_RAW_LFB_STRIDE SST_RAW_LFB_ADDR_STRIDE_8K static hwcInfo hInfo; +#if GL_X86 static _p_info *CPUInfo = NULL; +#endif #if (GLIDE_PLATFORM & GLIDE_OS_WIN32) static FxI32 *OSInfo = NULL; @@ -6289,7 +6291,8 @@ static void hwcReadRegion565(hwcBoardInfo *bInfo, FxU32 src, FxU32 src_x, FxU32 for (y = 0; y < src_y; y++) if((y & renderMask) == compareMask) s += strideInBytes; stride_diff = strideInBytes - (src_width*2); - + +#if GL_X86 if (CPUInfo && (CPUInfo->os_support & _CPU_FEATURE_MMX)) { /* MMX Optimized Loop */ @@ -6404,6 +6407,7 @@ static void hwcReadRegion565(hwcBoardInfo *bInfo, FxU32 src, FxU32 src_x, FxU32 MMX_RESET(); } else +#endif { /* Standard Unoptimized Loop */ for(y = src_y; y < end_y; y++) @@ -6447,7 +6451,8 @@ static void hwcReadRegion1555(hwcBoardInfo *bInfo, FxU32 src, FxU32 src_x, FxU32 for (y = 0; y < src_y; y++) if((y & renderMask) == compareMask) s += strideInBytes; stride_diff = strideInBytes - (src_width*2); - + +#if GL_X86 if (CPUInfo && (CPUInfo->os_support & _CPU_FEATURE_MMX)) { /* MMX Optimized Loop */ @@ -6561,6 +6566,7 @@ static void hwcReadRegion1555(hwcBoardInfo *bInfo, FxU32 src, FxU32 src_x, FxU32 MMX_RESET(); } else +#endif { /* Standard Unoptimized Loop */ for(y = src_y; y < end_y; y++) @@ -6605,7 +6611,8 @@ static void hwcReadRegion8888(hwcBoardInfo *bInfo, FxU32 src, FxU32 src_x, FxU32 for (y = 0; y < src_y; y++) if((y & renderMask) == compareMask) s += strideInBytes; stride_diff = strideInBytes - (src_width*4); - + +#if GL_X86 if (CPUInfo && (CPUInfo->os_support & _CPU_FEATURE_MMX)) { /* MMX Optimized Loop */ @@ -6673,6 +6680,7 @@ static void hwcReadRegion8888(hwcBoardInfo *bInfo, FxU32 src, FxU32 src_x, FxU32 MMX_RESET(); } else +#endif { /* Standard Unoptimized Loop */ for(y = src_y; y < end_y; y++) @@ -6948,6 +6956,7 @@ static void hwcCopyBuffer8888Flipped(hwcBoardInfo *bInfo, FxU16 *source, int w, FxU8 *endline = dst+w*4; w*= 4; +#if GL_X86 if (CPUInfo && (CPUInfo->os_support & _CPU_FEATURE_MMX)) { /* MMX Optimized Loop */ @@ -7061,6 +7070,7 @@ static void hwcCopyBuffer8888Flipped(hwcBoardInfo *bInfo, FxU16 *source, int w, #endif } else +#endif { while (dstos_support & _CPU_FEATURE_MMX)) { /* MMX Optimized Loop */ @@ -7201,6 +7212,7 @@ static void hwcCopyBuffer8888FlippedShifted(hwcBoardInfo *bInfo, FxU16 *source, #endif } else +#endif { while (dstos_support & _CPU_FEATURE_MMX)) { FxU32 sse_mmxplus = CPUInfo->os_support & (_CPU_FEATURE_MMXPLUS|_CPU_FEATURE_SSE); @@ -7590,6 +7603,7 @@ static void hwcCopyBuffer8888FlippedDithered(hwcBoardInfo *bInfo, FxU16 *source, #endif } else +#endif { while (dstos_support & _CPU_FEATURE_MMX)) { /* MMX Optimized Loop */ @@ -7947,7 +7961,7 @@ loop_begin: } else - +#endif while (dstmyLevel,"(%d,0x%x)\n",hintType,hints)); @@ -264,9 +271,11 @@ void _grHints(GrHint_t hintType, FxU32 hints) } else gc->state.checkFifo = FXFALSE; break; +#if GL_X86 case GR_HINT_FPUPRECISION: hints ? double_precision_asm() : single_precision_asm(); break; +#endif case GR_HINT_ALLOW_MIPMAP_DITHER: gc->state.allowLODdither = hints; break; diff --git a/glide3x/sst1/glide3/src/fxgasm.c b/glide3x/sst1/glide3/src/fxgasm.c index e8eeaa8..add0a4e 100644 --- a/glide3x/sst1/glide3/src/fxgasm.c +++ b/glide3x/sst1/glide3/src/fxgasm.c @@ -152,9 +152,13 @@ main (int argc, char **argv) NEWLINE; HEADER ("GlideRoot"); +#if GL_X86 OFFSET (gr,p6Fencer,"p6Fencer\t"); +#endif OFFSET (gr,current_sst,"current_sst\t"); +#if GL_X86 OFFSET (gr,CPUType,"CPUType\t\t"); +#endif OFFSET (gr,curGC,"curGC\t\t"); OFFSET (gr,curTriSize,"curTriSize\t"); OFFSET (gr,stats.trisProcessed,"trisProcessed\t"); diff --git a/glide3x/sst1/glide3/src/fxglide.h b/glide3x/sst1/glide3/src/fxglide.h index bb652a0..dcb9075 100644 --- a/glide3x/sst1/glide3/src/fxglide.h +++ b/glide3x/sst1/glide3/src/fxglide.h @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.2.4 2004/10/07 07:49:08 dborca +** comment the GR_CDECL hack to prevent accidents +** ** Revision 1.1.2.3 2004/10/04 09:35:59 dborca ** second cut at Glide3x for Voodoo1/Rush (massive update): ** delayed validation, vertex snapping, clip coordinates, strip/fan_continue, bugfixes. @@ -889,9 +892,13 @@ typedef struct GrGC_s ** stuff near the top is accessed a lot */ struct _GlideRoot_s { +#if GL_X86 int p6Fencer; /* xchg to here to keep this in cache!!! */ +#endif int current_sst; +#if GL_X86 FxU32 CPUType; +#endif GrGC *curGC; /* point to the current GC */ FxI32 curTriSize; /* the size in bytes of the current triangle */ FxI32 curTriSizeNoGradient; /* special for _trisetup_nogradients */ @@ -1248,6 +1255,7 @@ GWH_INC_WSH;\ #if (GLIDE_PLATFORM & GLIDE_HW_SST1) #define PACKER_WORKAROUND_SIZE 4 +#if GL_X86 #define PACKER_WORKAROUND \ if (_GlideRoot.CPUType == 6) {\ GR_P6FENCE;\ @@ -1257,6 +1265,9 @@ GWH_INC_WSH;\ else {\ GR_SET( *(FxU32 *)_GlideRoot.packerFixAddress, 0 ); \ } +#else + #define PACKER_WORKAROUND GR_SET(*(FxU32 *)_GlideRoot.packerFixAddress, 0); +#endif #define PACKER_BUGCHECK(a)\ if ( (((FxU32) a) ^ lastAddress) & SST_CHIP_MASK ) {\ @@ -1283,7 +1294,7 @@ GWH_INC_WSH;\ /* GMT: a very useful macro for making sure that SST commands are properly fenced on a P6, e.g. P6FENCH_CMD( GR_SET(hw->nopCMD,1) ); */ -#if (GLIDE_PLATFORM & GLIDE_HW_SST1) +#if (GLIDE_PLATFORM & GLIDE_HW_SST1) && GL_X86 #define P6FENCE_CMD( cmd ) \ if (_GlideRoot.CPUType == 6) { /* if it's a p6 */ \ GR_P6FENCE; /* then fence off the cmd */ \ @@ -1671,6 +1682,7 @@ _grFifoFWriteDebug((FxU32) a, (float) b, (FxU32) c) * size thing into here, and made usages of the macro not set the expected * size and do the sloppy check. */ +#if GL_X86 #define P6_NUDGE_OF_LOVE \ if (_GlideRoot.CPUType == 6) {\ int i;\ @@ -1687,7 +1699,11 @@ if (_GlideRoot.CPUType == 6) {\ for (i = 0; i < 23; i++) GR_SET(hw->nopCMD, 0); \ GR_CHECK_SIZE(); \ } +#else +#define P6_NUDGE_OF_LOVE +#endif +#if GL_X86 #define P6FENCEFIFO \ if (_GlideRoot.CPUType == 6) {\ GR_ASSERT(gc->hwDep.sst96Dep.writesSinceFence <= FENCE_AMOUNT);\ @@ -1695,6 +1711,9 @@ if (_GlideRoot.CPUType == 6) {\ GR_P6FENCE;\ }\ } +#else +#define P6FENCEFIFO +#endif #define SST96_STORE_FIFO(addr,val){\ GR_ASSERT(!(((FxU32)(gc->fifoData.hwDep.vg96FIFOData.fifoPtr) & 0x7)));\ diff --git a/glide3x/sst1/glide3/src/gdraw.c b/glide3x/sst1/glide3/src/gdraw.c index 8098998..11102a1 100644 --- a/glide3x/sst1/glide3/src/gdraw.c +++ b/glide3x/sst1/glide3/src/gdraw.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.2.4 2005/05/10 11:27:23 jwrdegoede +** sst1 gcc4 compile fixes +** ** Revision 1.1.2.3 2004/10/08 06:30:19 dborca ** save a round-trip with grDrawTriangle in SST1 ** @@ -320,7 +323,7 @@ _grVpDrawTriangle( const void *va, const void *vb, const void *vc ) } } - +#if GL_X86 /* Fence On P6 If Necessary */ if ( _GlideRoot.CPUType == 6 ) { /* In the macro there is a slop of 4 DWORDS that I have removed */ @@ -331,6 +334,7 @@ _grVpDrawTriangle( const void *va, const void *vb, const void *vc ) gc->hwDep.sst96Dep.writesSinceFence += _GlideRoot.curTriSize>>2; } +#endif /* Wrap Fifo now if triangle is going to incur a wrap */ if (gc->fifoData.hwDep.vg96FIFOData.fifoSize < (FxU32) _GlideRoot.curTriSize ) { diff --git a/glide3x/sst1/glide3/src/gglide.c b/glide3x/sst1/glide3/src/gglide.c index 69bbf68..32d45ce 100644 --- a/glide3x/sst1/glide3/src/gglide.c +++ b/glide3x/sst1/glide3/src/gglide.c @@ -19,6 +19,11 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.2.4 2004/10/04 09:35:59 dborca +** second cut at Glide3x for Voodoo1/Rush (massive update): +** delayed validation, vertex snapping, clip coordinates, strip/fan_continue, bugfixes. +** and probably a bunch of other crap that I forgot +** ** Revision 1.1.2.2 2004/03/08 07:42:21 dborca ** Voodoo Rush fixes ** @@ -1722,7 +1727,10 @@ GR_DDFUNC(_grRebuildDataList, void, ( void )) curTriSize = params = 0; i = gc->state.paramIndex; + +#if GL_X86 if (_GlideRoot.CPUType == 6) packMask |= 2; +#endif tmu0 = SST_CHIP(hw,0xE); /* tmu 0,1,2 */ tmu1 = SST_CHIP(hw,0xC); /* tmu 1,2 */ @@ -1934,7 +1942,9 @@ GR_DDFUNC(_grRebuildDataList, void, ( void )) curTriSize = params = 0; i = gc->state.paramIndex; +#if GL_X86 if (_GlideRoot.CPUType == 6) packMask |= 2; +#endif #ifdef GLIDE_USE_ALT_REGMAP hw = SST_WRAP(hw,128); /* wrap 128-257 are alternate register mappings */ diff --git a/glide3x/sst1/glide3/src/gpci.c b/glide3x/sst1/glide3/src/gpci.c index 28bbff0..938d7e0 100644 --- a/glide3x/sst1/glide3/src/gpci.c +++ b/glide3x/sst1/glide3/src/gpci.c @@ -19,6 +19,11 @@ ** ** $Header$ ** $Log$ + ** Revision 1.1.2.3 2004/10/04 09:36:00 dborca + ** second cut at Glide3x for Voodoo1/Rush (massive update): + ** delayed validation, vertex snapping, clip coordinates, strip/fan_continue, bugfixes. + ** and probably a bunch of other crap that I forgot + ** ** Revision 1.1.2.2 2004/03/08 07:42:21 dborca ** Voodoo Rush fixes ** @@ -421,8 +426,10 @@ _GlideInitEnvironment( void ) } #endif +#if GL_X86 _GlideRoot.CPUType = _cpu_detect_asm(); if (getenv("FX_CPU")) _GlideRoot.CPUType = atoi(getenv("FX_CPU")); +#endif _GlideRoot.environment.swapInterval = -1; _GlideRoot.environment.swFifoLWM = -1; @@ -456,7 +463,9 @@ _GlideInitEnvironment( void ) GDBG_INFO((80," noSplash: %d\n",_GlideRoot.environment.noSplash)); GDBG_INFO((80," shamelessPlug: %d\n",_GlideRoot.environment.shamelessPlug)); GDBG_INFO((80," sst2Flags: %d\n",_GlideRoot.environment.sst2Flags)); +#if GL_X86 GDBG_INFO((80," cpu: %d\n",_GlideRoot.CPUType)); +#endif GDBG_INFO((80," snapshot: %d\n",_GlideRoot.environment.snapshot)); GDBG_INFO((80," disableDitherSub: %d\n",_GlideRoot.environment.disableDitherSub)); diff --git a/glide3x/sst1/glide3/src/gsst.c b/glide3x/sst1/glide3/src/gsst.c index 34c1f15..943e5c3 100644 --- a/glide3x/sst1/glide3/src/gsst.c +++ b/glide3x/sst1/glide3/src/gsst.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.2.4 2004/10/05 14:47:18 dborca +** conditional compilation a bit more sane +** ** Revision 1.1.2.3 2004/10/04 09:36:00 dborca ** second cut at Glide3x for Voodoo1/Rush (massive update): ** delayed validation, vertex snapping, clip coordinates, strip/fan_continue, bugfixes. @@ -785,7 +788,9 @@ GR_ENTRY(grSstWinOpen, GrContext_t, (FxU32 hWnd, /* Set up FifoInfo with CPU Type so that init code knows if it needs to advance the write pointer beyond the read pointer for P6 */ +#if GL_X86 fifoInfo.cpuType = _GlideRoot.CPUType; +#endif rv = initEnableTransport( &fifoInfo ); if ( !rv ) goto BAILOUT; diff --git a/glide3x/sst1/glide3/src/gstrip.c b/glide3x/sst1/glide3/src/gstrip.c index 924ff51..187f853 100644 --- a/glide3x/sst1/glide3/src/gstrip.c +++ b/glide3x/sst1/glide3/src/gstrip.c @@ -19,6 +19,9 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.2.2 2005/05/10 11:27:23 jwrdegoede +** sst1 gcc4 compile fixes +** ** Revision 1.1.2.1 2004/10/04 09:35:32 dborca ** second cut at Glide3x for Voodoo1/Rush (massive update): ** delayed validation, vertex snapping, clip coordinates, strip/fan_continue, bugfixes. @@ -933,6 +936,7 @@ GR_DDFUNC(_trisetup_mixed_datalist, FxI32, ( const void *va, const void *vb, con } } +#if GL_X86 /* Fence On P6 If Necessary */ if ( _GlideRoot.CPUType == 6 ) { /* In the macro there is a slop of 4 DWORDS that I have removed */ @@ -943,6 +947,7 @@ GR_DDFUNC(_trisetup_mixed_datalist, FxI32, ( const void *va, const void *vb, con gc->hwDep.sst96Dep.writesSinceFence += _GlideRoot.curTriSize>>2; } +#endif /* Wrap Fifo now if triangle is going to incur a wrap */ if (gc->fifoData.hwDep.vg96FIFOData.fifoSize < (FxU32) _GlideRoot.curTriSize ) { @@ -1275,7 +1280,7 @@ _vp_trisetup_mixed_datalist( const void *va, const void *vb, const void *vc, FxB } } - +#if GL_X86 /* Fence On P6 If Necessary */ if ( _GlideRoot.CPUType == 6 ) { /* In the macro there is a slop of 4 DWORDS that I have removed */ @@ -1286,6 +1291,7 @@ _vp_trisetup_mixed_datalist( const void *va, const void *vb, const void *vc, FxB gc->hwDep.sst96Dep.writesSinceFence += _GlideRoot.curTriSize>>2; } +#endif /* Wrap Fifo now if triangle is going to incur a wrap */ if (gc->fifoData.hwDep.vg96FIFOData.fifoSize < (FxU32) _GlideRoot.curTriSize ) { diff --git a/glide3x/sst1/glide3/src/gxdraw.c b/glide3x/sst1/glide3/src/gxdraw.c index 8fdddad..70ac988 100644 --- a/glide3x/sst1/glide3/src/gxdraw.c +++ b/glide3x/sst1/glide3/src/gxdraw.c @@ -19,6 +19,11 @@ ** ** $Header$ ** $Log$ +** Revision 1.1.2.2 2004/10/04 09:36:00 dborca +** second cut at Glide3x for Voodoo1/Rush (massive update): +** delayed validation, vertex snapping, clip coordinates, strip/fan_continue, bugfixes. +** and probably a bunch of other crap that I forgot +** ** Revision 1.1.2.1 2004/03/02 07:55:30 dborca ** Bastardised Glide3x for SST1 ** @@ -240,7 +245,8 @@ GR_DDFUNC(_trisetup, FxI32, ( const void *va, const void *vb, const void *vc )) return -1; } } - + +#if GL_X86 /* Fence On P6 If Necessary */ if ( _GlideRoot.CPUType == 6 ) { /* In the macro there is a slop of 4 DWORDS that I have removed */ @@ -251,6 +257,7 @@ GR_DDFUNC(_trisetup, FxI32, ( const void *va, const void *vb, const void *vc )) gc->hwDep.sst96Dep.writesSinceFence += _GlideRoot.curTriSize>>2; } +#endif /* Wrap Fifo now if triangle is going to incur a wrap */ if (gc->fifoData.hwDep.vg96FIFOData.fifoSize < (FxU32) _GlideRoot.curTriSize ) { @@ -705,6 +712,7 @@ GR_DDFUNC(_trisetup_nogradients, FxI32, ( const void *va, const void *vb, const return 0; } +#if GL_X86 /* Fence On P6 If Necessary */ if ( _GlideRoot.CPUType == 6 ) { /* In the macro there is a slop of 4 DWORDS that I have removed */ @@ -716,6 +724,7 @@ GR_DDFUNC(_trisetup_nogradients, FxI32, ( const void *va, const void *vb, const gc->hwDep.sst96Dep.writesSinceFence += _GlideRoot.curTriSizeNoGradient>>2; } +#endif /* Wrap Fifo now if triangle is going to incur a wrap */ if (gc->fifoData.hwDep.vg96FIFOData.fifoSize < (FxU32) _GlideRoot.curTriSizeNoGradient ) { diff --git a/glide3x/sst1/init/init.h b/glide3x/sst1/init/init.h index f170f59..59592cf 100644 --- a/glide3x/sst1/init/init.h +++ b/glide3x/sst1/init/init.h @@ -300,8 +300,10 @@ typedef FxU32 InitSwapType_t; #define INIT_SWAP_BLT 0x1 typedef struct _InitFIFOData { +#if GL_X86 FxU32 cpuType; /* 5 for Pentium, 6 for Pentium Pro */ +#endif union { struct { FxU32 fifoFree; diff --git a/glide3x/sst1/init/init96/init96.c b/glide3x/sst1/init/init96/init96.c index 8e55aee..8d59d83 100644 --- a/glide3x/sst1/init/init96/init96.c +++ b/glide3x/sst1/init/init96/init96.c @@ -1368,6 +1368,7 @@ INITVG96ENTRY(init96EnableTransport, FxBool, ( InitFIFOData *info, InitRegisterD info->hwDep.vg96FIFOData.regDesc = regDesc; #endif /* SST96_ALT_FIFO_WRAP */ +#if GL_X86 if (info->cpuType == 6) { /* ** Now, write 128 DWORDS of NULL to the FIFO, so the FIFO read @@ -1384,6 +1385,7 @@ INITVG96ENTRY(init96EnableTransport, FxBool, ( InitFIFOData *info, InitRegisterD GDBG_INFO((125, "%s: No need for write pointer advance.\n", FN_NAME)); } +#endif /* ** NOTE TO ALL FOOLS WHO TREAD HERE